<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c, branch v5.19</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.19</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.19'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2022-06-29T18:50:42Z</updated>
<entry>
<title>drm/amdgpu: fix adev variable used in amdgpu_device_gpu_recover()</title>
<updated>2022-06-29T18:50:42Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2022-06-16T20:52:01Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=bbba251577b27422ebe173e1bd006424d6a8cfb3'/>
<id>urn:sha1:bbba251577b27422ebe173e1bd006424d6a8cfb3</id>
<content type='text'>
Use the correct adev variable for the drm_fb_helper in
amdgpu_device_gpu_recover().  Noticed by inspection.

Fixes: 087451f372bf ("drm/amdgpu: use generic fb helpers instead of setting up AMD own's.")
Reviewed-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu: move amdgpu_gmc_tmz_set after ip_version populated</title>
<updated>2022-05-26T18:56:32Z</updated>
<author>
<name>Sunil Khatri</name>
<email>sunil.khatri@amd.com</email>
</author>
<published>2022-05-17T05:57:11Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4d33e7040d70b50f1fb564f7020644ec5b45d6b7'/>
<id>urn:sha1:4d33e7040d70b50f1fb564f7020644ec5b45d6b7</id>
<content type='text'>
To enable TMZ feature based on IP version needs adev-&gt;ip_version
populated but its empty. Move amdgpu_gmc_tmz_set to a place where
ip_version is populated.

Signed-off-by: Sunil Khatri &lt;sunil.khatri@amd.com&gt;
Reviewed-by: Alexander Deucher &lt;Alexander.Deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: support ras on SRIOV</title>
<updated>2022-05-26T18:56:32Z</updated>
<author>
<name>Stanley.Yang</name>
<email>Stanley.Yang@amd.com</email>
</author>
<published>2022-04-27T04:16:51Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=950d64250fba5fbb8c290f692de8ffdee380726c'/>
<id>urn:sha1:950d64250fba5fbb8c290f692de8ffdee380726c</id>
<content type='text'>
support umc/gfx/sdma ras on guest side

Changed from V1:
    move sriov judgment in amdgpu_ras_interrupt_fatal_error_handler

Signed-off-by: Stanley.Yang &lt;Stanley.Yang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/psp: Add vbflash sysfs interface support</title>
<updated>2022-05-10T21:53:10Z</updated>
<author>
<name>Likun Gao</name>
<email>Likun.Gao@amd.com</email>
</author>
<published>2022-02-22T05:34:28Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=8424f2ccb3c0dd43369288a47d15c980136c3bd5'/>
<id>urn:sha1:8424f2ccb3c0dd43369288a47d15c980136c3bd5</id>
<content type='text'>
Add sysfs interface to copy VBIOS.

v2: squash in fix for proper vmalloc API (Alex)

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: flush delete wq after wait fence</title>
<updated>2022-05-06T20:56:41Z</updated>
<author>
<name>Yiqing Yao</name>
<email>yiqing.yao@amd.com</email>
</author>
<published>2022-05-05T10:12:33Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=98f561884683cdca65bec80ef4dddfc3fe7aca63'/>
<id>urn:sha1:98f561884683cdca65bec80ef4dddfc3fe7aca63</id>
<content type='text'>
[why]
lru_list not empty warning in sw fini during repeated device bind unbind.
There should be a amdgpu_fence_wait_empty() before the flush_delayed_work()
call as Christian suggested.

[how]
Move to do flush_delayed_work for ttm bo delayed delete wq after fence_driver_hw_fini.

Tested by: Yiqing Yao &lt;yiqing.yao@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Yiqing Yao &lt;yiqing.yao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Enable KFD with MES enabled</title>
<updated>2022-05-04T14:43:52Z</updated>
<author>
<name>Mukul Joshi</name>
<email>mukul.joshi@amd.com</email>
</author>
<published>2022-03-31T19:00:46Z</published>
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<id>urn:sha1:c004d44e1037752a1a5a271a6915a57d3e2ebc43</id>
<content type='text'>
Enable KFD initialization with MES enabled.

Signed-off-by: Mukul Joshi &lt;mukul.joshi@amd.com&gt;
Acked-by: Oak Zeng &lt;Oak.Zeng@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Reviewed-by: Harish Kasiviswanathan &lt;Harish.Kasiviswanathan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: skip kfd routines when mes enabled</title>
<updated>2022-05-04T14:43:52Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2022-03-31T18:09:30Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=9c12f5cd06f88821ba5ea46ef874dd92580a2a00'/>
<id>urn:sha1:9c12f5cd06f88821ba5ea46ef874dd92580a2a00</id>
<content type='text'>
For kfd hasn't supported mes, skip kfd routines.

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add mes_kiq module parameter v2</title>
<updated>2022-05-04T14:43:49Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2021-04-14T08:04:31Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=928fe236c002ed75dfb3b7a0abe6e3d2a3c87376'/>
<id>urn:sha1:928fe236c002ed75dfb3b7a0abe6e3d2a3c87376</id>
<content type='text'>
mes_kiq parameter is used to enable mes kiq pipe.
This module parameter is unneccessary or enabled by default
in final version.

v2: reword commit message.

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use the whole doorbell space for mes</title>
<updated>2022-05-04T14:04:01Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2020-03-20T06:53:07Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=de33a32968e8e2a22b0d6ae621a4505fccce8234'/>
<id>urn:sha1:de33a32968e8e2a22b0d6ae621a4505fccce8234</id>
<content type='text'>
Use the whole doorbell space for mes. Each queue in one process occupies
one doorbell slot to ring the queue submitting.

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: switch to atomfirmware_asic_init</title>
<updated>2022-04-28T21:48:00Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2022-02-28T10:35:02Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=85d1bcc6e0c0367af04ca16fcf2de514465d3f32'/>
<id>urn:sha1:85d1bcc6e0c0367af04ca16fcf2de514465d3f32</id>
<content type='text'>
Some initial settings now are not available from
the atom data table. The assumption that !ps[0]
|| !ps[1] in amdgpu_atom_asic_init is not valid.
In addition, driver needs to strictly follow
atomfirmware structure (asic_init_parameters) to
initialize parameters used to execute asic_init
function, otherwise, the execution of asic_init
would fail.

This shall be applicable to all soc15 adapters,but
let make the transition on soc21 first.

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
