<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c, branch v5.9</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.9</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.9'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2020-09-29T21:07:06Z</updated>
<entry>
<title>drm/amdgpu: remove gpu_info fw support for sienna_cichlid etc.</title>
<updated>2020-09-29T21:07:06Z</updated>
<author>
<name>Jiansong Chen</name>
<email>Jiansong.Chen@amd.com</email>
</author>
<published>2020-09-23T03:58:23Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0c7014154d6397d6a35bf3759839207f1c702a42'/>
<id>urn:sha1:0c7014154d6397d6a35bf3759839207f1c702a42</id>
<content type='text'>
Remove gpu_info fw support for sienna_cichlid etc., since the
information can be retrieved from discovery binary.

Signed-off-by: Jiansong Chen &lt;Jiansong.Chen@amd.com&gt;
Reviewed-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix PSP autoload twice in FLR</title>
<updated>2020-08-06T20:44:41Z</updated>
<author>
<name>Liu ChengZhe</name>
<email>ChengZhe.Liu@amd.com</email>
</author>
<published>2020-07-24T09:22:15Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6b6124bb4a0b05fa9ac052e14dd7c37c42ab9297'/>
<id>urn:sha1:6b6124bb4a0b05fa9ac052e14dd7c37c42ab9297</id>
<content type='text'>
Assigning false to block-&gt;status.hw overwrites PSP's previous
hardware status, which causes the PSP to Resume operation after
hardware init.

Remove this assignment and let the PSP execute Resume operation
when it is told to.

v2: Remove the braces.
v3: Modify the description.

Signed-off-by: Liu ChengZhe &lt;ChengZhe.Liu@amd.com&gt;
Reviewed-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: add DC support for navy flounder</title>
<updated>2020-07-15T17:27:26Z</updated>
<author>
<name>Bhawanpreet Lakha</name>
<email>Bhawanpreet.Lakha@amd.com</email>
</author>
<published>2020-07-08T21:11:12Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a6c5308f2a7ad2a79fb6fd60b52367c51434c04a'/>
<id>urn:sha1:a6c5308f2a7ad2a79fb6fd60b52367c51434c04a</id>
<content type='text'>
Plumb DC support for navy flounder through.

Signed-off-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: set asic family and ip blocks for navy_flounder</title>
<updated>2020-07-15T16:45:48Z</updated>
<author>
<name>Jiansong Chen</name>
<email>Jiansong.Chen@amd.com</email>
</author>
<published>2020-02-10T07:08:53Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=41f446bf52f36b4c5875873f78389312d50b3cff'/>
<id>urn:sha1:41f446bf52f36b4c5875873f78389312d50b3cff</id>
<content type='text'>
Add the asic family and IP blocks for navy flounder.

Signed-off-by: Jiansong Chen &lt;Jiansong.Chen@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add navy_flounder gpu info firmware</title>
<updated>2020-07-15T16:45:43Z</updated>
<author>
<name>Jiansong Chen</name>
<email>Jiansong.Chen@amd.com</email>
</author>
<published>2020-02-10T07:00:33Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=120eb83336098ec9cdd21e81b80ccd8232287110'/>
<id>urn:sha1:120eb83336098ec9cdd21e81b80ccd8232287110</id>
<content type='text'>
Signed-off-by: Jiansong Chen &lt;Jiansong.Chen@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add navy_flounder asic type</title>
<updated>2020-07-15T16:45:39Z</updated>
<author>
<name>Jiansong Chen</name>
<email>Jiansong.Chen@amd.com</email>
</author>
<published>2020-02-10T06:25:57Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ddd8fbe77dadf6d889a7bbd0f82fc29093582d75'/>
<id>urn:sha1:ddd8fbe77dadf6d889a7bbd0f82fc29093582d75</id>
<content type='text'>
Signed-off-by: Jiansong Chen &lt;Jiansong.Chen@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: RAS emergency restart logic refine</title>
<updated>2020-07-15T16:41:47Z</updated>
<author>
<name>Wenhui Sheng</name>
<email>Wenhui.Sheng@amd.com</email>
</author>
<published>2020-07-13T07:14:30Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=bb5c7235eaafb4e2f957e9f0f71a187db5cf525a'/>
<id>urn:sha1:bb5c7235eaafb4e2f957e9f0f71a187db5cf525a</id>
<content type='text'>
If we are in RAS triggered situation and
BACO isn't support, emergency restart is needed,
and this code is only needed for some specific
cases(vega20 with given smu fw version).

After we add smu mode1 reset for sienna cichlid, we
need to share AMD_RESET_METHOD_MODE1 with psp mode1 reset,
so in amdgpu_device_gpu_recover, we need differentiate
which mode1 reset we are using, then decide if it's
a full reset and then decide if emergency restart is needed,
the logic will become much more complex.

After discussion with Hawking, move emergency restart logic
to an independent function.

Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Signed-off-by: Wenhui Sheng &lt;Wenhui.Sheng@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: minor cleanup of phase1 suspend code</title>
<updated>2020-07-10T21:42:42Z</updated>
<author>
<name>Nirmoy Das</name>
<email>nirmoy.das@amd.com</email>
</author>
<published>2020-07-09T13:41:40Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2b9f78481b3e16925e2bfa6256a227e104dc2e79'/>
<id>urn:sha1:2b9f78481b3e16925e2bfa6256a227e104dc2e79</id>
<content type='text'>
Cleanup of phase1 suspend code to reduce unnecessary indentation.

Signed-off-by: Nirmoy Das &lt;nirmoy.das@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: enable gpu recovery for sienna cichlid</title>
<updated>2020-07-10T21:41:06Z</updated>
<author>
<name>Likun Gao</name>
<email>Likun.Gao@amd.com</email>
</author>
<published>2020-07-08T03:04:16Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=131a3c7474adce63b988f6913085aee8c6e7c313'/>
<id>urn:sha1:131a3c7474adce63b988f6913085aee8c6e7c313</id>
<content type='text'>
Enable gpu recovery for sienna cichlid by default to trigger
gpu recovery once needed.

Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Revert "drm/amdgpu: support access regs outside of mmio bar"</title>
<updated>2020-07-02T16:02:56Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2020-06-30T07:52:27Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e78b579d2d607404b544979dcd6878c9a83e78ca'/>
<id>urn:sha1:e78b579d2d607404b544979dcd6878c9a83e78ca</id>
<content type='text'>
This reverts commit 2eee0229f65e897134566888e5321bcb3af0df7a.
Fallback to a stable base until we have a correct new one

Signed-off-by:Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
