<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c, branch v5.10</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.10</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.10'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2020-11-16T21:59:52Z</updated>
<entry>
<title>drm/amdgpu: remove experimental flag from arcturus</title>
<updated>2020-11-16T21:59:52Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2020-11-16T15:10:52Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c1609f0e2882095408708a80693e298a90f17904'/>
<id>urn:sha1:c1609f0e2882095408708a80693e298a90f17904</id>
<content type='text'>
This has been stable for a while.

Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add DID for navi10 blockchain SKU</title>
<updated>2020-10-26T21:07:23Z</updated>
<author>
<name>Tianci.Yin</name>
<email>tianci.yin@amd.com</email>
</author>
<published>2020-10-14T09:05:50Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=8942881144a7365143f196f5eafed24783a424a3'/>
<id>urn:sha1:8942881144a7365143f196f5eafed24783a424a3</id>
<content type='text'>
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Signed-off-by: Tianci.Yin &lt;tianci.yin@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'amd-drm-fixes-5.10-2020-10-09' of git://people.freedesktop.org/~agd5f/linux into drm-next</title>
<updated>2020-10-12T00:40:43Z</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2020-10-12T00:40:42Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0d2e90f47c4f80a5dcf10f5fe57b5e692e62b48f'/>
<id>urn:sha1:0d2e90f47c4f80a5dcf10f5fe57b5e692e62b48f</id>
<content type='text'>
amd-drm-fixes-5.10-2020-10-09:

amdgpu:
- Clean up indirect register access
- Navy Flounder fixes
- SMU11 AC/DC interrupt fixes
- GPUVM alignment fix
- Display fixes
- Misc other fixes

Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;
From: Alex Deucher &lt;alexdeucher@gmail.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20201009222810.4030-1-alexander.deucher@amd.com
</content>
</entry>
<entry>
<title>drm/amdgpu: add an auto setting to the noretry parameter</title>
<updated>2020-09-25T20:55:21Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2020-09-23T13:50:24Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d5cc02d97ab125b62075ad296e4dca9a7fc54c9b'/>
<id>urn:sha1:d5cc02d97ab125b62075ad296e4dca9a7fc54c9b</id>
<content type='text'>
This allows us to set different defaults on a per asic basis.  This
way we can enable noretry on dGPUs where it can increase performance
in certain cases and disable it on chips where it can be problematic.

For now the default is 0 for all asics, but we may want to try and
enable it again for newer dGPUs.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'drm-misc-next-2020-09-21' of git://anongit.freedesktop.org/drm/drm-misc into drm-next</title>
<updated>2020-09-22T23:52:24Z</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2020-09-22T23:49:48Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6ea6be77086f23d4b346c9946dae24593befda2e'/>
<id>urn:sha1:6ea6be77086f23d4b346c9946dae24593befda2e</id>
<content type='text'>
drm-misc-next for 5.10:

UAPI Changes:

Cross-subsystem Changes:
  - virtio: Merged a PR for patches that will affect drm/virtio

Core Changes:
  - dev: More devm_drm convertions and removal of drm_dev_init
  - atomic: Split out drm_atomic_helper_calc_timestamping_constants of
    drm_atomic_helper_update_legacy_modeset_state
  - ttm: More rework

Driver Changes:
  - i915: selftests improvements
  - panfrost: support for Amlogic SoC
  - vc4: one fix
  - tree-wide: conversions to devm_drm_dev_alloc,
  - ast: simplifications of the atomic modesetting code
  - panfrost: multiple fixes
  - vc4: multiple fixes
Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;

From: Maxime Ripard &lt;maxime@cerno.tech&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20200921152956.2gxnsdgxmwhvjyut@gilmour.lan
</content>
</entry>
<entry>
<title>drm/amdgpu: Convert to using devm_drm_dev_alloc() (v2)</title>
<updated>2020-09-21T08:44:46Z</updated>
<author>
<name>Luben Tuikov</name>
<email>luben.tuikov@amd.com</email>
</author>
<published>2020-09-18T13:25:04Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=df2ce4596c04485fd77adcb18ec033d6c94da2dd'/>
<id>urn:sha1:df2ce4596c04485fd77adcb18ec033d6c94da2dd</id>
<content type='text'>
Convert to using devm_drm_dev_alloc(),
as drm_dev_init() is going away.

v2: Remove drm_dev_put() since
    a) devres doesn't do refcounting, see
    Documentation/driver-api/driver-model/devres.rst,
    Section 4, paragraph 1; and since
    b) devres acts as garbage collector when
    the DRM device's parent's devres "action" callback
    is called to free the container device (amdgpu_device),
    which embeds the DRM dev.

Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20200918132505.2316382-4-daniel.vetter@ffwll.ch
</content>
</entry>
<entry>
<title>drm/amdgpu: remove experimental flag from navi12</title>
<updated>2020-09-18T01:22:17Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2020-09-15T17:36:20Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d34c7b7b6b9180cc4a1d3447c398792e65c7b04e'/>
<id>urn:sha1:d34c7b7b6b9180cc4a1d3447c398792e65c7b04e</id>
<content type='text'>
Navi12 has worked fine for a while now.

Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add device ID for sienna_cichlid (v2)</title>
<updated>2020-09-17T22:01:59Z</updated>
<author>
<name>Likun Gao</name>
<email>Likun.Gao@amd.com</email>
</author>
<published>2020-01-16T02:45:38Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=61278d14bb483308c6065ff3da0f71383ea97403'/>
<id>urn:sha1:61278d14bb483308c6065ff3da0f71383ea97403</id>
<content type='text'>
Add device ID for sienna_cichlid.

v2: squash in additional device ids.

Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Fail to load on RAVEN if SME is active</title>
<updated>2020-09-15T21:52:43Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2020-09-06T16:05:12Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ea68573d408fdf8df31dc93e826c35a1f6218f36'/>
<id>urn:sha1:ea68573d408fdf8df31dc93e826c35a1f6218f36</id>
<content type='text'>
Due to hardware bugs, scatter/gather display on raven requires
a 1:1 IOMMU mapping, however, SME (System Memory Encryption)
requires an indirect IOMMU mapping because the encryption bit
is beyond the DMA mask of the chip.  As such, the two are
incompatible.

Acked-by: Joerg Roedel &lt;jroedel@suse.de&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Acked-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Fix consecutive DPC recovery failures.</title>
<updated>2020-09-15T21:25:04Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2020-08-24T16:30:47Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c1dd4aa624076cb6d4724fad2d9e9e71e46bbc9f'/>
<id>urn:sha1:c1dd4aa624076cb6d4724fad2d9e9e71e46bbc9f</id>
<content type='text'>
Cache the PCI state on boot and before each case where we might
loose it.

v2: Add pci_restore_state while caching the PCI state to avoid
breaking PCI core logic for stuff like suspend/resume.

v3: Extract pci_restore_state from amdgpu_device_cache_pci_state
to avoid superflous restores during GPU resets and suspend/resumes.

v4: Style fixes.

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
