<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c, branch v5.7</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.7</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.7'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2020-03-10T19:55:11Z</updated>
<entry>
<title>drm/amdgpu: call ras_debugfs_create_all in debugfs_init</title>
<updated>2020-03-10T19:55:11Z</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2020-03-06T04:24:06Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=204eaac625d57d32d8b4c42b57271a359b76db5a'/>
<id>urn:sha1:204eaac625d57d32d8b4c42b57271a359b76db5a</id>
<content type='text'>
and remove each ras IP's own debugfs creation

this is required to fix ras when the driver does not use the drm load
and unload callbacks due to ordering issues with the drm device node.

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Stanley.Yang &lt;Stanley.Yang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: set compute queue priority at mqd_init</title>
<updated>2020-03-09T17:51:24Z</updated>
<author>
<name>Nirmoy Das</name>
<email>nirmoy.das@amd.com</email>
</author>
<published>2020-02-27T12:59:08Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=33abcb1f5a1719b1c18867e5bf24fb70efe98804'/>
<id>urn:sha1:33abcb1f5a1719b1c18867e5bf24fb70efe98804</id>
<content type='text'>
We were changing compute ring priority while rings were being used
before every job submission which is not recommended. This patch
sets compute queue priority at mqd initialization for gfx8, gfx9 and
gfx10.

Policy: make queue 0 of each pipe as high priority compute queue

High/normal priority compute sched lists are generated from set of high/normal
priority compute queues. At context creation, entity of compute queue
get a sched list from high or normal priority depending on ctx-&gt;priority

Signed-off-by: Nirmoy Das &lt;nirmoy.das@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use amdgpu_ring_test_helper when possible</title>
<updated>2020-02-26T19:17:33Z</updated>
<author>
<name>Nirmoy Das</name>
<email>nirmoy.das@amd.com</email>
</author>
<published>2020-02-25T13:29:45Z</published>
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<id>urn:sha1:c6fc97f9bc5c69ac030be9c3d8b8a2716690da1d</id>
<content type='text'>
amdgpu_ring_test_helper already handles ring-&gt;sched.ready correctly

Signed-off-by: Nirmoy Das &lt;nirmoy.das@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: provide a generic function interface for reading/writing register by KIQ</title>
<updated>2020-01-22T21:34:14Z</updated>
<author>
<name>chen gong</name>
<email>curry.gong@amd.com</email>
</author>
<published>2020-01-15T06:32:00Z</published>
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<id>urn:sha1:d33a99c4b63643d3d7a85d4dfb2ac5afb01eebca</id>
<content type='text'>
Move amdgpu_virt_kiq_rreg/amdgpu_virt_kiq_wreg function to amdgpu_gfx.c,
and rename them to amdgpu_kiq_rreg/amdgpu_kiq_wreg.Make it generic and
flexible.

Signed-off-by: chen gong &lt;curry.gong@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: cover the powerplay implementation details V3</title>
<updated>2020-01-14T15:18:08Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2020-01-07T08:57:39Z</published>
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<id>urn:sha1:9530273ec90cc0614f6ac56d0c024e2f39886419</id>
<content type='text'>
This can save users much troubles. As they do not
actually need to care whether swSMU or traditional
powerplay routine should be used.

V2: apply the fixes to vi.c and cik.c also
V3: squash in oops fix

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: drop useless BACO arg in amdgpu_ras_reset_gpu</title>
<updated>2019-12-18T21:09:06Z</updated>
<author>
<name>Guchun Chen</name>
<email>guchun.chen@amd.com</email>
</author>
<published>2019-12-13T08:46:05Z</published>
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<id>urn:sha1:619346240932ac86a0f0c42f887827ae759eda47</id>
<content type='text'>
BACO reset mode strategy is determined by latter func when
calling amdgpu_ras_reset_gpu. So not to confuse audience, drop
it.

Signed-off-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/gfx10: fix out-of-bound mqd_backup array access</title>
<updated>2019-11-22T19:55:12Z</updated>
<author>
<name>Xiaojie Yuan</name>
<email>xiaojie.yuan@amd.com</email>
</author>
<published>2019-11-22T19:21:15Z</published>
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<id>urn:sha1:908a28be092e425967099a2488ead7fc80572989</id>
<content type='text'>
Fixes: 0900a9efdb7909 ("drm/amdgpu/gfx10: fix mqd backup/restore for gfx rings (v2)")
Signed-off-by: Xiaojie Yuan &lt;xiaojie.yuan@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/gfx10: fix mqd backup/restore for gfx rings (v2)</title>
<updated>2019-11-22T19:35:10Z</updated>
<author>
<name>Xiaojie Yuan</name>
<email>xiaojie.yuan@amd.com</email>
</author>
<published>2019-10-29T08:59:09Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0900a9efdb79097dac253a67f6c4fe0a42b2508d'/>
<id>urn:sha1:0900a9efdb79097dac253a67f6c4fe0a42b2508d</id>
<content type='text'>
1. no need to allocate an extra member for 'mqd_backup' array
2. backup/restore mqd to/from the correct 'mqd_backup' array slot

v2: warning fix (Alex)

Signed-off-by: Xiaojie Yuan &lt;xiaojie.yuan@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove unused parameter in amdgpu_gfx_kiq_free_ring</title>
<updated>2019-10-25T20:50:10Z</updated>
<author>
<name>Nirmoy Das</name>
<email>nirmoy.das@amd.com</email>
</author>
<published>2019-10-23T14:33:52Z</published>
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<id>urn:sha1:9f0256da6ba0fbe05f4e86d5b1153f89b54c5fd4</id>
<content type='text'>
Signed-off-by: Nirmoy Das &lt;nirmoy.das@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove set but not used variable 'pipe'</title>
<updated>2019-10-03T14:11:06Z</updated>
<author>
<name>yu kuai</name>
<email>yukuai3@huawei.com</email>
</author>
<published>2019-09-29T12:38:43Z</published>
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<id>urn:sha1:2e0db9dec25f8d60acb61ddc1a48cbbcabdbdd19</id>
<content type='text'>
Fixes gcc '-Wunused-but-set-variable' warning:

rivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c: In function
‘amdgpu_gfx_graphics_queue_acquire’:
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c:234:16: warning:
variable ‘pipe’ set but not used [-Wunused-but-set-variable]

It is never used, so can be removed.

Reported-by: Hulk Robot &lt;hulkci@huawei.com&gt;
Signed-off-by: yu kuai &lt;yukuai3@huawei.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
