linux/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c, branch v5.9

drm/amdgpu: add read amdgpu_gfxoff status in debugfs

2020-07-21T19:37:37Z

Add interface for SMU12 device, used by UMR. v2: fix code style Signed-off-by: Jinzhou.Su Reviewed-by: Evan Quan Reviewed-by: Huang Rui Signed-off-by: Alex Deucher

drm/amdgpu: Rename amdgpu_gfx_kcq_queue_mask_transform()

2020-05-01T19:19:07Z

Rename it to amdgpu_queue_mask_bit_to_set_resource_bit() to be more specific about its functionality. KFD will use it later. Signed-off-by: Yong Zhao Signed-off-by: Alex Deucher

drm/amdgpu: update the method to set kcq queue mask

2020-05-01T19:19:07Z

Use a common method to set queue mask before set kiq resource. The value of queue mask must suitablt for the designated form. Signed-off-by: Likun Gao Reviewed-by: Huang Rui Signed-off-by: Alex Deucher

drm/amdgpu: protect ring overrun

2020-04-24T15:42:11Z

Wait for the oldest sequence on the ring to be signaled in order to make sure there will be no command overrun. v2: fix coding stype and remove abs operation v3: remove the initialization of variable r Signed-off-by: Yintian Tao Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: request reg_val_offs each kiq read reg

2020-04-23T19:06:41Z

According to the current kiq read register method, there will be race condition when using KIQ to read register if multiple clients want to read at same time just like the expample below: 1. client-A start to read REG-0 throguh KIQ 2. client-A poll the seqno-0 3. client-B start to read REG-1 through KIQ 4. client-B poll the seqno-1 5. the kiq complete these two read operation 6. client-A to read the register at the wb buffer and get REG-1 value Therefore, use amdgpu_device_wb_get() to request reg_val_offs for each kiq read register. v2: fix the error remove v3: fix the print typo v4: remove unused variables Signed-off-by: Yintian Tao Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu/kiq: add no_scheduler flag to KIQ

2020-04-13T16:02:24Z

We don't want a GPU scheduler for this ring. Reviewed-by: Christian König Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher

drm/amdgpu: rework sched_list generation

2020-04-09T14:43:14Z

Generate HW IP's sched_list in amdgpu_ring_init() instead of amdgpu_ctx.c. This makes amdgpu_ctx_init_compute_sched(), ring.has_high_prio and amdgpu_ctx_init_sched() unnecessary. This patch also stores sched_list for all HW IPs in one big array in struct amdgpu_device which makes amdgpu_ctx_init_entity() much more leaner. v2: fix a coding style issue do not use drm hw_ip const to populate amdgpu_ring_type enum v3: remove ctx reference and move sched array and num_sched to a struct use num_scheds to detect uninitialized scheduler list v4: use array_index_nospec for user space controlled variables fix possible checkpatch.pl warnings Signed-off-by: Nirmoy Das Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: call ras_debugfs_create_all in debugfs_init

2020-03-10T19:55:11Z

and remove each ras IP's own debugfs creation this is required to fix ras when the driver does not use the drm load and unload callbacks due to ordering issues with the drm device node. Signed-off-by: Tao Zhou Signed-off-by: Stanley.Yang Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: set compute queue priority at mqd_init

2020-03-09T17:51:24Z

We were changing compute ring priority while rings were being used before every job submission which is not recommended. This patch sets compute queue priority at mqd initialization for gfx8, gfx9 and gfx10. Policy: make queue 0 of each pipe as high priority compute queue High/normal priority compute sched lists are generated from set of high/normal priority compute queues. At context creation, entity of compute queue get a sched list from high or normal priority depending on ctx->priority Signed-off-by: Nirmoy Das Acked-by: Alex Deucher Acked-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: use amdgpu_ring_test_helper when possible

2020-02-26T19:17:33Z

amdgpu_ring_test_helper already handles ring->sched.ready correctly Signed-off-by: Nirmoy Das Reviewed-by: Christian König Signed-off-by: Alex Deucher