<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c, branch v6.3</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v6.3</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v6.3'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2023-01-19T03:48:49Z</updated>
<entry>
<title>drm/amdgpu: allow multipipe policy on ASICs with one MEC</title>
<updated>2023-01-19T03:48:49Z</updated>
<author>
<name>Lang Yu</name>
<email>Lang.Yu@amd.com</email>
</author>
<published>2023-01-11T01:32:15Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=25959dd67ddea75595af2b2d2217191aba1e6d71'/>
<id>urn:sha1:25959dd67ddea75595af2b2d2217191aba1e6d71</id>
<content type='text'>
Always enable multipipe policy on ASICs with GC VERSION &gt; 9.0.0
instead of MEC number &gt; 1.

This will allow multipipe policy on ASICs with one MEC,
e.g., gfx11 APUs.

Signed-off-by: Lang Yu &lt;Lang.Yu@amd.com&gt;
Reviewed-by: Aaron Liu &lt;aaron.liu@amd.com&gt;
Reviewed-by: Yifan Zhang &lt;yifan1.zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Perform gpu reset after gfx finishes processing ras poison consumption on gfx_v11_0_3</title>
<updated>2023-01-17T21:11:51Z</updated>
<author>
<name>YiPeng Chai</name>
<email>YiPeng.Chai@amd.com</email>
</author>
<published>2023-01-04T05:13:21Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ac7b25d92c6f967217c92a401734bf041187996f'/>
<id>urn:sha1:ac7b25d92c6f967217c92a401734bf041187996f</id>
<content type='text'>
Perform gpu reset after gfx finishes processing
ras poison consumption on gfx_v11_0_3.

V2:
 Move gfx poison consumption handler from hw_ops to ip
 function level.

V3:
 Adjust the calling position of amdgpu_gfx_poison_consumation_handler.

V4:
   Since gfx v11_0_3 does not have .hw_ops instance, the .hw_ops null
 pointer check in amdgpu_ras_interrupt_poison_consumption_handler
 needs to be adjusted.

Signed-off-by: YiPeng Chai &lt;YiPeng.Chai@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add gfx ras function on gfx v11_0_3</title>
<updated>2023-01-17T21:11:50Z</updated>
<author>
<name>YiPeng Chai</name>
<email>YiPeng.Chai@amd.com</email>
</author>
<published>2022-11-02T06:07:35Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=89e4c448817835700de108edcb11f26a88414986'/>
<id>urn:sha1:89e4c448817835700de108edcb11f26a88414986</id>
<content type='text'>
Add gfx ras function on gfx v11_0_3.

V2:
 1. Add separate source files for gfx v11_0_3.
 2. Create a common function to initialize gfx ras block.

V3:
 1. Rename amdgpu_gfx_ras_block_init to amdgpu_gfx_ras_sw_init.
 2. Adjust the calling position of amdgpu_gfx_ras_sw_init.
 3. Remove gfx_v11_0_3_ras_ops.

V4:
 Revert changes in amdgpu_ras_interrupt_poison_consumption_handler.

V5:
 1. Remove invalid include file in gfx_v11_0_3.c.
 2. Reduce the number of parameters of amdgpu_gfx_ras_sw_init.

Signed-off-by: YiPeng Chai &lt;YiPeng.Chai@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use VRAM|GTT for a bunch of kernel allocations</title>
<updated>2023-01-03T21:49:54Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2022-01-14T15:49:44Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=58ab2c08d708ca8309768545b75741636c53a336'/>
<id>urn:sha1:58ab2c08d708ca8309768545b75741636c53a336</id>
<content type='text'>
Technically all of those can use GTT as well, no need to force things
into VRAM.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt;
Acked-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: complete gfxoff allow signal during suspend without delay</title>
<updated>2022-11-09T22:41:42Z</updated>
<author>
<name>Harsh Jain</name>
<email>harsh.jain@amd.com</email>
</author>
<published>2022-11-02T09:53:08Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4b31b92b143f7d209f3d494c56d4c4673e9fc53d'/>
<id>urn:sha1:4b31b92b143f7d209f3d494c56d4c4673e9fc53d</id>
<content type='text'>
change guarantees that gfxoff is allowed before moving further in
s2idle sequence to add more reliablity about gfxoff in amdgpu IP's
suspend flow

Signed-off-by: Harsh Jain &lt;harsh.jain@amd.com&gt;
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix compiler warning for amdgpu_gfx_cp_init_microcode</title>
<updated>2022-09-29T13:41:46Z</updated>
<author>
<name>Likun Gao</name>
<email>Likun.Gao@amd.com</email>
</author>
<published>2022-09-27T09:15:20Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2d89e2ddfd00ca569dd73883c7c70badbd57f4ac'/>
<id>urn:sha1:2d89e2ddfd00ca569dd73883c7c70badbd57f4ac</id>
<content type='text'>
Change the type of parameter on amdgpu_gfx_cp_init_microcode to fix
compiler warning.

Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add function to init CP microcode</title>
<updated>2022-09-29T13:41:43Z</updated>
<author>
<name>Likun Gao</name>
<email>Likun.Gao@amd.com</email>
</author>
<published>2022-09-20T05:46:52Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ec71b250170f60986ea1d2feba6d3b6a63bb1ac2'/>
<id>urn:sha1:ec71b250170f60986ea1d2feba6d3b6a63bb1ac2</id>
<content type='text'>
Add an common function to init CP related microcode.

Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd: Add detailed GFXOFF stats to debugfs</title>
<updated>2022-08-16T22:17:31Z</updated>
<author>
<name>André Almeida</name>
<email>andrealmeid@igalia.com</email>
</author>
<published>2022-08-10T23:28:55Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0ad7347a64ac4baec1786810709eebedc5f823d5'/>
<id>urn:sha1:0ad7347a64ac4baec1786810709eebedc5f823d5</id>
<content type='text'>
Add debugfs interface to log GFXOFF statistics:

- Read amdgpu_gfxoff_count to get the total GFXOFF entry count at the
  time of query since system power-up

- Write 1 to amdgpu_gfxoff_residency to start logging, and 0 to stop.
  Read it to get average GFXOFF residency % multiplied by 100
  during the last logging interval.

Both features are designed to be keep the values persistent between
suspends.

Signed-off-by: André Almeida &lt;andrealmeid@igalia.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: reduce reset time</title>
<updated>2022-08-16T22:14:31Z</updated>
<author>
<name>Victor Zhao</name>
<email>Victor.Zhao@amd.com</email>
</author>
<published>2022-06-24T04:00:06Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=194eb174cbe4fe2b3376ac30acca2dc8c8beca00'/>
<id>urn:sha1:194eb174cbe4fe2b3376ac30acca2dc8c8beca00</id>
<content type='text'>
In multi container use case, reset time is important, so skip ring
tests and cp halt wait during ip suspending for reset as they are
going to fail and cost more time on reset

v2: add a hang flag to indicate the reset comes from a job timeout,
skip ring test and cp halt wait in this case

v3: move hang flag to adev

Signed-off-by: Victor Zhao &lt;Victor.Zhao@amd.com&gt;
Acked-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: enable mes to access registers v2</title>
<updated>2022-06-30T19:28:24Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2022-06-16T13:34:24Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=cf6067290034b9ebbe4c39733b1a4acc94876c26'/>
<id>urn:sha1:cf6067290034b9ebbe4c39733b1a4acc94876c26</id>
<content type='text'>
Enable mes to access registers.

v2: squash mes sched ring enablement flag

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
