linux/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h, branch v7.0

drm/amd: Pass `adev` to amdgpu_gfx_parse_disable_cu()

2026-01-05T21:59:54Z

In order for messages to be attribute to the correct device amdgpu_gfx_parse_disable_cu() needs to know what device is being operated on. Pass the argument in. Signed-off-by: Mario Limonciello (AMD) Reviewed-by: Aurabindo Pillai Signed-off-by: Alex Deucher

drm/amdgpu: fix mes packet params issue when flush hdp.

2025-12-10T22:38:21Z

v4: use func "amdgpu_gfx_get_hdp_flush_mask" to get ref_and_mask for gfx9 through gfx12. v3: Unify the get_ref_and_mask function in amdgpu_gfx_funcs, to support both GFX11 and earlier generations v2: place "get_ref_and_mask" in amdgpu_gfx_funcs instead of amdgpu_ring, since this function only assigns the cp entry. v1: both gfx ring and mes ring use cp0 to flush hdp, cause conflict. use function get_ref_and_mask to assign the cp entry. reassign mes to use cp8 instead. Signed-off-by: chong li Acked-by: Lijo Lazar Signed-off-by: Alex Deucher

drm/amdgpu/gfx: add eop size and alignment to shadow info

2025-12-10T22:38:15Z

This is used by firmware for compute user queues. Reviewed-by: Prike Liang Signed-off-by: Alex Deucher

drm/amdgpu: use GPU_HDP_FLUSH for sriov

2025-10-20T22:25:41Z

Currently SRIOV runtime will use kiq to write HDP_MEM_FLUSH_CNTL for hdp flush. This register need to be write from CPU for nbif to aware, otherwise it will not work. Implement amdgpu_kiq_hdp_flush and use kiq to do gpu hdp flush during sriov runtime. v2: - fallback to amdgpu_asic_flush_hdp when amdgpu_kiq_hdp_flush failed - add function amdgpu_mes_hdp_flush v3: - changed returned error Reviewed-by: Lijo Lazar Signed-off-by: Victor Zhao Signed-off-by: Alex Deucher

drm/amdgpu: Remove volatile from CSB functions

2025-09-15T20:51:04Z

The CSB buffer manipulation occurs in memory where the BO is mapped during initialization, and some references to this buffer are handled with volatile, which is incorrect in this scenario. There are a few cases where the use of volatile is accepted, but none of them align with CSB operations. Therefore, this commit removes all the volatile variables associated with the CSB code. Reviewed-by: Christian König Signed-off-by: Rodrigo Siqueira Signed-off-by: Alex Deucher

drm/amdgpu: Add documentation associated with CSB

2025-04-30T22:05:41Z

Add a description for the get_csb_buffer callback, update the glossary, and add some extra information about RB, which is associated with CSB configuration. Signed-off-by: Rodrigo Siqueira Signed-off-by: Alex Deucher

drm/amdgpu/gfx: Introduce helpers handling CSB manipulation

2025-04-30T22:04:29Z

From GFX6 to GFX11, there is a function for getting the CSB buffer to be put into the hardware. Three common parts are duplicated in all of these GFX functions: 1. Prepare the CSB preamble. 2. Parser the CS data. 3. End the CSB preamble. This commit creates helpers to be used from GFX6 to GFX11. Signed-off-by: Rodrigo Siqueira Signed-off-by: Alex Deucher

drm/amdgpu: rename enforce isolation variables

2025-04-21T14:56:06Z

Since they will be used for both KFD and KGD user queues, rename them from kfd to userq. No intended functional change. Acked-by: Sunil Khatri Signed-off-by: Alex Deucher

drm/amdgpu/userq: rework driver parameter

2025-04-21T14:55:47Z

Replace disable_kq parameter with user_queue parameter. The parameter has the following logic: -1 = auto (ASIC specific default) 0 = user queues disabled 1 = user queues enabled and kernel queues enabled (if supported) 2 = user queues enabled and kernel queues disabled The default behavior (-1) is currently the same as 0 for current ASICs. To enable user queues (in addition to kernel queues) set user_queue=1. To enable user queues and disable kernel queues (to make all resources available to user queues), set user_queue=2. Reviewed-by: Sunil Khatri Signed-off-by: Alex Deucher

drm/amdgpu/gfx: add generic handling for disable_kq

2025-04-08T20:48:22Z

Add proper checks for disable_kq functionality in gfx helper functions. Add special logic for families that require the clear state setup. v2: use ring count as per Felix suggestion v3: fix num_gfx_rings handling in amdgpu_gfx_graphics_queue_acquire() v4: fix error code (Alex) Reviewed-by: Prike Liang Reviewed-by: Sunil Khatri Signed-off-by: Alex Deucher