<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c, branch v6.4</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v6.4</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v6.4'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2023-06-01T02:28:43Z</updated>
<entry>
<title>drm/amdgpu: enable tmz by default for GC 11.0.1</title>
<updated>2023-06-01T02:28:43Z</updated>
<author>
<name>Ikshwaku Chauhan</name>
<email>ikshwaku.chauhan@amd.com</email>
</author>
<published>2023-05-25T05:27:26Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=663b930e24842f3d3bb79418bb5cd8d01b40c559'/>
<id>urn:sha1:663b930e24842f3d3bb79418bb5cd8d01b40c559</id>
<content type='text'>
Add IP GC 11.0.1 in the list of target to have
tmz enabled by default.

Signed-off-by: Ikshwaku Chauhan &lt;ikshwaku.chauhan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org # 6.1.x
</content>
</entry>
<entry>
<title>drm/amdgpu: move vmhub out of amdgpu_ring_funcs (v4)</title>
<updated>2023-04-14T17:47:49Z</updated>
<author>
<name>Le Ma</name>
<email>le.ma@amd.com</email>
</author>
<published>2022-05-19T11:49:59Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0530553ba842884737a689ae5fac11154dcf3122'/>
<id>urn:sha1:0530553ba842884737a689ae5fac11154dcf3122</id>
<content type='text'>
It looks better to place this field in ring
structure. Also drop the repeated ring funcs definitions
if there's no difference except for vmhub field.

v2: rename the field to vm_hub like others (Le)
v3: apply the changes to new ip blocks (Hawking)
v4: fix vcn sw ring (Alex)

Signed-off-by: Le Ma &lt;le.ma@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Rework retry fault removal</title>
<updated>2023-04-13T04:14:24Z</updated>
<author>
<name>Mukul Joshi</name>
<email>mukul.joshi@amd.com</email>
</author>
<published>2023-04-11T20:32:38Z</published>
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<id>urn:sha1:dd299441654fd8209056c7985ddf2373ebaba6ed</id>
<content type='text'>
Rework retry fault removal from the software filter by
storing an expired timestamp for a fault that is being removed.
When a new fault comes, and it matches an entry in the sw filter,
it will be added as a new fault only when its timestamp is greater
than the timestamp expiry of the fault in the sw filter.
This helps in avoiding stale faults being added back into the
filter and preventing legitimate faults from being handled.

Suggested-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Mukul Joshi &lt;mukul.joshi@amd.com&gt;
Reviewed-by: Philip Yang &lt;Philip.Yang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Set noretry/xnack for GC 9.4.3</title>
<updated>2023-03-31T15:18:55Z</updated>
<author>
<name>Amber Lin</name>
<email>Amber.Lin@amd.com</email>
</author>
<published>2021-06-09T16:36:35Z</published>
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<id>urn:sha1:cebbfdd5f099a16d57d9221cec76882867839ad3</id>
<content type='text'>
For GC 9.4.3, disable retry as default and XNACK can be different
modes per process.

Signed-off-by: Amber Lin &lt;Amber.Lin@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Rework xgmi_wafl_pcs ras sw_init</title>
<updated>2023-03-15T22:45:27Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2023-03-04T11:54:14Z</published>
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<id>urn:sha1:da9d669eab152dbd6e9410606a7c8c8a212a7959</id>
<content type='text'>
To align with other IP blocks.

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Stanley Yang &lt;Stanley.Yang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Rework mca ras sw_init</title>
<updated>2023-03-15T22:45:26Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2023-03-15T00:59:04Z</published>
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<id>urn:sha1:7f544c5488cf5bc94b379de750e08fa3e146b6ba</id>
<content type='text'>
To align with other IP blocks

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Stanley Yang &lt;Stanley.Yang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Move hdp ras block init to ras sw_init</title>
<updated>2023-03-13T21:27:48Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2023-03-04T09:24:46Z</published>
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<id>urn:sha1:474e2d491efe8ce516e743dbce6a6e75bac3b3db</id>
<content type='text'>
Initialize hdp ras block only when mmhub ip block
supports ras features. Driver queries ras capabilities
after early_init, ras block init needs to be moved to
sw_init.

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Stanley Yang &lt;Stanley.Yang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Move mmhub ras block init to ras sw_init</title>
<updated>2023-03-13T21:27:48Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2023-03-04T08:39:48Z</published>
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<id>urn:sha1:fec70a8601a76272b08b7b8077b3c3e3c79bdb72</id>
<content type='text'>
Initialize mmhub ras block only when mmhub ip block
supports ras features. Driver queries ras capabilities
after early_init, ras block init needs to be moved to
sw_init.

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Stanley Yang &lt;Stanley.Yang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Move umc ras block init to gmc ras sw_init</title>
<updated>2023-03-13T21:27:48Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2023-03-11T09:36:11Z</published>
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<id>urn:sha1:a6dcf9a7ccfed57abd44c24cc505b559281d44b9</id>
<content type='text'>
Initialize umc ras block only when umc ip block
supports ras. Driver queries ras capabilities after
early_init, ras block init needs to be moved to
sw_init.

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Stanley Yang &lt;Stanley.Yang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add tmz support for GC 10.3.6</title>
<updated>2023-02-23T22:35:58Z</updated>
<author>
<name>Jesse Zhang</name>
<email>Jesse.Zhang@amd.com</email>
</author>
<published>2023-02-16T06:11:33Z</published>
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<id>urn:sha1:08c6ab7fb4d98694df5a9954a42a365cc538f9b0</id>
<content type='text'>
this patch to add tmz support for GC 10.3.6

Signed-off-by: Jesse Zhang &lt;Jesse.Zhang@amd.com&gt;
Reviewed-by: Yifan Zhang &lt;yifan1.zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
