<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c, branch v6.8</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v6.8</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v6.8'/>
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<updated>2024-01-15T23:31:59Z</updated>
<entry>
<title>drm/amdgpu: Fix with right return code '-EIO' in 'amdgpu_gmc_vram_checking()'</title>
<updated>2024-01-15T23:31:59Z</updated>
<author>
<name>Srinivasan Shanmugam</name>
<email>srinivasan.shanmugam@amd.com</email>
</author>
<published>2024-01-04T09:56:42Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=fac4ebd79fed60e79cccafdad45a2bb8d3795044'/>
<id>urn:sha1:fac4ebd79fed60e79cccafdad45a2bb8d3795044</id>
<content type='text'>
The amdgpu_gmc_vram_checking() function in emulation checks whether
all of the memory range of shared system memory could be accessed by
GPU, from this aspect, -EIO is returned for error scenarios.

Fixes the below:
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c:919 gmc_v6_0_hw_init() warn: missing error code? 'r'
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c:1103 gmc_v7_0_hw_init() warn: missing error code? 'r'
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c:1223 gmc_v8_0_hw_init() warn: missing error code? 'r'
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c:2344 gmc_v9_0_hw_init() warn: missing error code? 'r'

Cc: Xiaojian Du &lt;Xiaojian.Du@amd.com&gt;
Cc: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Cc: Christian König &lt;christian.koenig@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Srinivasan Shanmugam &lt;srinivasan.shanmugam@amd.com&gt;
Suggested-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix AGP addressing when GART is not at 0</title>
<updated>2023-11-29T21:49:22Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2023-11-10T14:39:18Z</published>
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<id>urn:sha1:ca0b006939f9701ab2e14a08ed9ef77a8014d2c5</id>
<content type='text'>
This worked by luck if the GART aperture ended up at 0.  When
we ended up moving GART on some chips, the GART aperture ended
up offsetting the AGP address since the resource-&gt;start is
a GART offset, not an MC address.  Fix this by moving the AGP
address setup into amdgpu_bo_gpu_offset_no_check().

v2: check mem_type before checking agp
v3: check if the ttm bo has a ttm_tt allocated yet

Fixes: 67318cb84341 ("drm/amdgpu/gmc11: set gart placement GC11")
Tested-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Reported-by: Jesse Zhang &lt;Jesse.Zhang@amd.com&gt;
Reported-by: Yifan Zhang &lt;yifan1.zhang@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: christian.koenig@amd.com
Cc: mario.limonciello@amd.com
</content>
</entry>
<entry>
<title>drm/amd: Disable XNACK on SRIOV environment</title>
<updated>2023-11-07T16:15:37Z</updated>
<author>
<name>Surbhi Kakarya</name>
<email>surbhi.kakarya@amd.com</email>
</author>
<published>2023-09-25T16:12:10Z</published>
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<id>urn:sha1:9256e8d47a2fa0bcb5d32e7fee8c674c476a480f</id>
<content type='text'>
The purpose of this patch is to disable XNACK or set XNACK OFF mode
on SRIOV platform which doesn't support it.

This will prevent user-space application to fail or result into
unexpected behaviour whenever the application need to run test-case
in XNACK ON mode.

Signed-off-by: Surbhi Kakarya &lt;surbhi.kakarya@amd.com&gt;
Reviewed-by: Shaoyun Liu &lt;shaoyun.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add tmz support for GC IP v11.5.0</title>
<updated>2023-10-26T22:41:21Z</updated>
<author>
<name>Jiadong Zhu</name>
<email>Jiadong.Zhu@amd.com</email>
</author>
<published>2023-09-06T00:58:02Z</published>
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<id>urn:sha1:037fb9c600240fd4e7e525c7e08e42645a44b2f7</id>
<content type='text'>
Add tmz support for GC 11.5.0.

Signed-off-by: Jiadong Zhu &lt;Jiadong.Zhu@amd.com&gt;
Reviewed-by: Yifan Zhang &lt;yifan1.zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Address member 'gart_placement' not described in 'amdgpu_gmc_gart_location'</title>
<updated>2023-10-13T14:58:22Z</updated>
<author>
<name>Srinivasan Shanmugam</name>
<email>srinivasan.shanmugam@amd.com</email>
</author>
<published>2023-10-09T14:53:32Z</published>
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<id>urn:sha1:54967d5683b24767c58789af19cf7083e560aa56</id>
<content type='text'>
Fixes the below:
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c:274: warning: Function parameter or member 'gart_placement' not described in 'amdgpu_gmc_gart_location'

Cc: Christian König &lt;christian.koenig@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: "Pan, Xinhui" &lt;Xinhui.Pan@amd.com&gt;
Signed-off-by: Srinivasan Shanmugam &lt;srinivasan.shanmugam@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/gmc: add a way to force a particular placement for GART</title>
<updated>2023-10-04T22:36:07Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2023-09-14T20:23:01Z</published>
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<id>urn:sha1:917f91d8d8e866965f2193d7962e064a4d139d8d</id>
<content type='text'>
We normally place GART based on the location of VRAM and the
available address space around that, but provide an option
to force a particular location for hardware that needs it.

v2: Switch to passing the placement via parameter

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/gmc: set a default disable value for AGP</title>
<updated>2023-09-26T21:00:22Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2023-09-20T17:27:58Z</published>
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<id>urn:sha1:de59b69932e64d77445d973a101d81d6e7e670c6</id>
<content type='text'>
To disable AGP, the start needs to be set to a higher
value than the end.  Set a default disable value for
the AGP aperture and allow the IP specific GMC code
to enable it selectively be calling amdgpu_gmc_agp_location().

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: further move TLB hw workarounds a layer up</title>
<updated>2023-09-26T20:55:09Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2023-09-04T15:41:11Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=08abccc9a7a7ff51cb10948042360448ea30d413'/>
<id>urn:sha1:08abccc9a7a7ff51cb10948042360448ea30d413</id>
<content type='text'>
For the PASID flushing we already handled that at a higher layer, apply
those workarounds to the standard flush as well.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: rework lock handling for flush_tlb v2</title>
<updated>2023-09-26T20:55:09Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2023-09-04T14:58:45Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e2e3788850b9e250d6b3dee36e37ee5c73ae024c'/>
<id>urn:sha1:e2e3788850b9e250d6b3dee36e37ee5c73ae024c</id>
<content type='text'>
Instead of each implementation doing this more or less correctly
move taking the reset lock at a higher level.

v2: fix typo

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: drop error return from flush_gpu_tlb_pasid</title>
<updated>2023-09-26T20:55:09Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2023-09-04T13:50:35Z</published>
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<id>urn:sha1:3983c9fd2d8b5aa254f5f467604d30f977bb1a04</id>
<content type='text'>
That function never fails, drop the error return.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
