<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h, branch v6.4</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v6.4</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v6.4'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2023-04-13T04:14:24Z</updated>
<entry>
<title>drm/amdgpu: Rework retry fault removal</title>
<updated>2023-04-13T04:14:24Z</updated>
<author>
<name>Mukul Joshi</name>
<email>mukul.joshi@amd.com</email>
</author>
<published>2023-04-11T20:32:38Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=dd299441654fd8209056c7985ddf2373ebaba6ed'/>
<id>urn:sha1:dd299441654fd8209056c7985ddf2373ebaba6ed</id>
<content type='text'>
Rework retry fault removal from the software filter by
storing an expired timestamp for a fault that is being removed.
When a new fault comes, and it matches an entry in the sw filter,
it will be added as a new fault only when its timestamp is greater
than the timestamp expiry of the fault in the sw filter.
This helps in avoiding stale faults being added back into the
filter and preventing legitimate faults from being handled.

Suggested-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Mukul Joshi &lt;mukul.joshi@amd.com&gt;
Reviewed-by: Philip Yang &lt;Philip.Yang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Init MMVM_CONTEXTS_DISABLE in gmc11 golden setting under SRIOV</title>
<updated>2023-03-15T22:45:26Z</updated>
<author>
<name>Yifan Zha</name>
<email>Yifan.Zha@amd.com</email>
</author>
<published>2023-03-06T06:54:05Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=057e335c71361063e173381cecf2e8487ec8b552'/>
<id>urn:sha1:057e335c71361063e173381cecf2e8487ec8b552</id>
<content type='text'>
[Why]
If disable the mmhub vm contexts(set MMVM_CONTEXTS_DISABLE to 0xffff),
driver loading failed on vf due to fence fallback timer expired on all rings.
FLR cannot reset MMVM_CONTEXTS_DISABLE.
So this vf can not be recovered anymore unless trigger a whole gpu reset.

[How]
Under SRIOV, init MMVM_CONTEXTS_DISABLE in gmc11 golden register setting.

Signed-off-by: Yifan Zha &lt;Yifan.Zha@amd.com&gt;
Reviewed-by: Horace Chen &lt;Horace.Chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Move umc ras block init to gmc ras sw_init</title>
<updated>2023-03-13T21:27:48Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2023-03-11T09:36:11Z</published>
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<id>urn:sha1:a6dcf9a7ccfed57abd44c24cc505b559281d44b9</id>
<content type='text'>
Initialize umc ras block only when umc ip block
supports ras. Driver queries ras capabilities after
early_init, ras block init needs to be moved to
sw_init.

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Stanley Yang &lt;Stanley.Yang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: save and restore gc hub regs</title>
<updated>2022-08-16T22:14:31Z</updated>
<author>
<name>Victor Zhao</name>
<email>Victor.Zhao@amd.com</email>
</author>
<published>2022-06-21T08:59:44Z</published>
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<id>urn:sha1:bfaced6ee77484d8b9c6baf86a8e9406f80108c5</id>
<content type='text'>
Save and restore gfxhub regs as they will be reset during mode 2

Signed-off-by: Victor Zhao &lt;Victor.Zhao@amd.com&gt;
Acked-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: save the setting of VM_CONTEXT_CNTL</title>
<updated>2022-05-04T13:57:22Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2021-05-12T07:53:48Z</published>
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<id>urn:sha1:d7dab4fc44ad020b48a893dae728190e2f01f14d</id>
<content type='text'>
MES firmware needs the setting of VM_CONTEXT_CNTL to perform
vmid switch. Save the initial setting when hub initializing.

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add mmhub v3_0 ip block</title>
<updated>2022-05-04T13:57:18Z</updated>
<author>
<name>Tianci.Yin</name>
<email>tianci.yin@amd.com</email>
</author>
<published>2020-10-12T10:10:13Z</published>
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<id>urn:sha1:98a0f8687e3135b4606e17bb05fc0a5fa33be55f</id>
<content type='text'>
Add support for mmhub v3.0

Signed-off-by: Tianci.Yin &lt;tianci.yin@amd.com&gt;
Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/discovery: store the number of UMC IPs on the asic</title>
<updated>2022-04-28T21:47:22Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2022-03-31T22:12:47Z</published>
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<id>urn:sha1:a2efebf1a4f8b2bb092668e1dabaa9981cd87af1</id>
<content type='text'>
For chips with IP discovery get this from the table,
hardcode it for older asics.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: store the mall size in the gmc structure</title>
<updated>2022-04-28T21:47:16Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2022-03-31T22:11:51Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=053d35dedd7f2e0cb5e74ea8588aed09d6701d9c'/>
<id>urn:sha1:053d35dedd7f2e0cb5e74ea8588aed09d6701d9c</id>
<content type='text'>
This will be useful in future patches.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Merge get_reserved_allocation to get_vbios_allocations.</title>
<updated>2022-03-15T19:01:12Z</updated>
<author>
<name>Yongqiang Sun</name>
<email>yongqiang.sun@amd.com</email>
</author>
<published>2022-03-14T18:17:08Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3f543552846b9ae47c8442af1c506207bdcc00d2'/>
<id>urn:sha1:3f543552846b9ae47c8442af1c506207bdcc00d2</id>
<content type='text'>
Some ASICs need reserved memory for firmware or other components,
which is not allowed to be used by driver.
amdgpu_gmc_get_reserved_allocation is to handle additional areas.
To avoid any missing calling,
merged amdgpu_gmc_get_reserved_allocation to
amdgpu_gmc_get_vbios_allocations.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Yongqiang Sun &lt;yongqiang.sun@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Move xgmi ras initialization from .late_init to .early_init</title>
<updated>2022-01-25T23:00:33Z</updated>
<author>
<name>yipechai</name>
<email>YiPeng.Chai@amd.com</email>
</author>
<published>2022-01-18T09:59:45Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1f33bd18d703ecdf7b664168d640439e867d1605'/>
<id>urn:sha1:1f33bd18d703ecdf7b664168d640439e867d1605</id>
<content type='text'>
Move xgmi ras initialization from .late_init to .early_init, which let
xgmi ras can be initialized only once.

Signed-off-by: yipechai &lt;YiPeng.Chai@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
