<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c, branch v4.3</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.3</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.3'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2015-08-25T14:39:39Z</updated>
<entry>
<title>drm/amdgpu: fix fence wait in sync_fence, instead should be in sync_rings</title>
<updated>2015-08-25T14:39:39Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2015-08-20T06:47:40Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f91b3a69418120974c9a416939b903ec86607c52'/>
<id>urn:sha1:f91b3a69418120974c9a416939b903ec86607c52</id>
<content type='text'>
Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Reviewed-by: Christian K?nig &lt;christian.koenig@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove v_seq handling from the scheduler v2</title>
<updated>2015-08-25T14:39:16Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2015-08-19T13:00:55Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ce882e6dc241ab8dded0eeeb33a86482d44a5689'/>
<id>urn:sha1:ce882e6dc241ab8dded0eeeb33a86482d44a5689</id>
<content type='text'>
Simply not used any more. Only keep 32bit atomic for fence sequence numbering.

v2: trivial rebase

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt; (v1)
Reviewed-by: Jammy Zhou &lt;Jammy.Zhou@amd.com&gt; (v1)
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt; (v1)
</content>
</entry>
<entry>
<title>drm/amdgpu: improve sa_bo-&gt;fence by kernel fence</title>
<updated>2015-08-25T14:38:41Z</updated>
<author>
<name>Chunming Zhou</name>
<email>david1.zhou@amd.com</email>
</author>
<published>2015-08-19T08:41:19Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4ce9891ee17c6e064cc334e3297f7e992d47f3a6'/>
<id>urn:sha1:4ce9891ee17c6e064cc334e3297f7e992d47f3a6</id>
<content type='text'>
Signed-off-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Reviewed-by: Christian K?nig &lt;christian.koenig@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix zeroing all IB fields manually v2</title>
<updated>2015-08-20T21:05:34Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2015-08-18T16:23:16Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b203dd95949ec8d5e30d53446408eb9a4d1bdc62'/>
<id>urn:sha1:b203dd95949ec8d5e30d53446408eb9a4d1bdc62</id>
<content type='text'>
The problem now is that we don't necessarily call amdgpu_ib_get()
in some error paths and so work with uninitialized data.

Better require that the memory is already zeroed.

v2: better commit message

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt; (v1)
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd: add scheduler fence implementation (v2)</title>
<updated>2015-08-17T20:51:07Z</updated>
<author>
<name>Chunming Zhou</name>
<email>david1.zhou@amd.com</email>
</author>
<published>2015-08-02T03:18:04Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f556cb0caeec1ba9b8e5e2aa85b47e76277f5d4b'/>
<id>urn:sha1:f556cb0caeec1ba9b8e5e2aa85b47e76277f5d4b</id>
<content type='text'>
scheduler fence is based on kernel fence framework.

v2: squash in Christian's build fix

Signed-off-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Reviewed-by: Christian K?nig &lt;christian.koenig@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix seq in ctx_add_fence</title>
<updated>2015-08-17T20:50:43Z</updated>
<author>
<name>Chunming Zhou</name>
<email>david1.zhou@amd.com</email>
</author>
<published>2015-07-30T09:59:43Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d1ff9086c1b8e67390161599006a34056b437a72'/>
<id>urn:sha1:d1ff9086c1b8e67390161599006a34056b437a72</id>
<content type='text'>
if enabling scheduler, then the queued seq is assigned
when pushing job before emitting job.

Signed-off-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Reviewed-by: Christian K?nig &lt;christian.koenig@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix UVD/VCE fence handling</title>
<updated>2015-08-17T20:50:18Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2015-07-21T16:02:21Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5430a3ffb0b1902e8aea4ed2ba256b1263126e8d'/>
<id>urn:sha1:5430a3ffb0b1902e8aea4ed2ba256b1263126e8d</id>
<content type='text'>
We need to return the sequence number to userspace
even when we don't use user fences.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: rework vm_grab_id interface</title>
<updated>2015-08-17T20:50:16Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2015-07-20T14:09:40Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7f8a5290f5b6c14dd1d295e2508e0dd193a9fda5'/>
<id>urn:sha1:7f8a5290f5b6c14dd1d295e2508e0dd193a9fda5</id>
<content type='text'>
This makes assigning VM IDs independent from the use of VM IDs.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Jammy Zhou &lt;Jammy.Zhou@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add user fence context map v2</title>
<updated>2015-08-17T20:50:14Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2015-07-07T15:24:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=21c16bf634e62cf9673946f509b469e7f0953ecf'/>
<id>urn:sha1:21c16bf634e62cf9673946f509b469e7f0953ecf</id>
<content type='text'>
This is a prerequisite for the GPU scheduler to make the order
of submission independent from the order of execution.

v2: properly implement the locking

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Jammy Zhou &lt;Jammy.Zhou@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: deal with foreign fences in amdgpu_sync</title>
<updated>2015-08-17T20:50:13Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2015-07-06T20:06:40Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=91e1a5207edec9e4f888e44478a9a254186e0ba8'/>
<id>urn:sha1:91e1a5207edec9e4f888e44478a9a254186e0ba8</id>
<content type='text'>
This also requires some error handling from the callers of that function.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Jammy Zhou &lt;Jammy.Zhou@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
</content>
</entry>
</feed>
