<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c, branch v5.17</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.17</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.17'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2021-09-14T19:56:49Z</updated>
<entry>
<title>drm/amdgpu: Increase direct IB pool size</title>
<updated>2021-09-14T19:56:49Z</updated>
<author>
<name>xinhui pan</name>
<email>xinhui.pan@amd.com</email>
</author>
<published>2021-09-09T05:26:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a7496559e4d101eaaff99ccfd93298e557cc8505'/>
<id>urn:sha1:a7496559e4d101eaaff99ccfd93298e557cc8505</id>
<content type='text'>
Direct IB pool is used for vce/vcn IB extra msg too. Increase its size
to AMDGPU_IB_POOL_SIZE.

v2: Squash in unused variable removal

Signed-off-by: xinhui pan &lt;xinhui.pan@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/amdgpu embed hw_fence into amdgpu_job</title>
<updated>2021-08-16T19:16:58Z</updated>
<author>
<name>Jack Zhang</name>
<email>Jack.Zhang1@amd.com</email>
</author>
<published>2021-05-12T07:06:35Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c530b02f39850a639b72d01ebbf7e5d745c60831'/>
<id>urn:sha1:c530b02f39850a639b72d01ebbf7e5d745c60831</id>
<content type='text'>
Why: Previously hw fence is alloced separately with job.
It caused historical lifetime issues and corner cases.
The ideal situation is to take fence to manage both job
and fence's lifetime, and simplify the design of gpu-scheduler.

How:
We propose to embed hw_fence into amdgpu_job.
1. We cover the normal job submission by this method.
2. For ib_test, and submit without a parent job keep the
legacy way to create a hw fence separately.
v2:
use AMDGPU_FENCE_FLAG_EMBED_IN_JOB_BIT to show that the fence is
embedded in a job.
v3:
remove redundant variable ring in amdgpu_job
v4:
add tdr sequence support for this feature. Add a job_run_counter to
indicate whether this job is a resubmit job.
v5
add missing handling in amdgpu_fence_enable_signaling

Signed-off-by: Jingwen Chen &lt;Jingwen.Chen2@amd.com&gt;
Signed-off-by: Jack Zhang &lt;Jack.Zhang7@hotmail.com&gt;
Reviewed-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Reviewed by: Monk Liu &lt;monk.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Don't flush/invalidate HDP for APUs and A+A</title>
<updated>2021-06-04T20:02:38Z</updated>
<author>
<name>Eric Huang</name>
<email>jinhuieric.huang@amd.com</email>
</author>
<published>2021-06-02T19:05:20Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=810085ddb7b76c1cc5059a1feb3b1250eceacf23'/>
<id>urn:sha1:810085ddb7b76c1cc5059a1feb3b1250eceacf23</id>
<content type='text'>
Integrate two generic functions to determine if HDP
flush is needed for all Asics.

Signed-off-by: Eric Huang &lt;jinhuieric.huang@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove unsafe optimization to drop preamble ib</title>
<updated>2021-06-02T02:55:39Z</updated>
<author>
<name>Jiansong Chen</name>
<email>Jiansong.Chen@amd.com</email>
</author>
<published>2021-05-13T02:56:50Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7d9c70d23550eb86a1bec1954ccaa8d6ec3a3328'/>
<id>urn:sha1:7d9c70d23550eb86a1bec1954ccaa8d6ec3a3328</id>
<content type='text'>
Take the situation with gfxoff, the optimization may cause
corrupt CE ram contents. In addition emit_cntxcntl callback
has similar optimization which firmware can handle properly
even for power feature.

Signed-off-by: Jiansong Chen &lt;Jiansong.Chen@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix no full coverage issue for gprs initialization</title>
<updated>2021-04-29T03:36:05Z</updated>
<author>
<name>Dennis Li</name>
<email>Dennis.Li@amd.com</email>
</author>
<published>2021-04-27T14:21:03Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0e0036c7d13b945260ff1ce8377eca7ea877c008'/>
<id>urn:sha1:0e0036c7d13b945260ff1ce8377eca7ea877c008</id>
<content type='text'>
The wave's number per simd in aldebaran is changed to 8, so it is
impossible to use old algorithm to initiate all sgprs with one
threadgroup. The new algorithm firstly use three threadgroups to
initiate most sgprs simultaneously and then use another threadgroup with
4 waves to cover other uninitiated sgprs.

v2:
Add more description about the new algorithm to clear sgprs and add some
comment for shader binaries

Signed-off-by: Dennis Li &lt;Dennis.Li@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add mem sync flag for IB allocated by SA</title>
<updated>2021-04-21T01:45:24Z</updated>
<author>
<name>Jinzhou Su</name>
<email>Jinzhou.Su@amd.com</email>
</author>
<published>2021-04-20T08:17:14Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5c88e3b86a88f14efa0a3ddd28641c6ff49fb9c4'/>
<id>urn:sha1:5c88e3b86a88f14efa0a3ddd28641c6ff49fb9c4</id>
<content type='text'>
The buffer of SA bo will be used by many cases. So it's better
to invalidate the cache of indirect buffer allocated by SA before
commit the IB.

Signed-off-by: Jinzhou Su &lt;Jinzhou.Su@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: do not use drm middle layer for debugfs</title>
<updated>2021-02-18T21:43:09Z</updated>
<author>
<name>Nirmoy Das</name>
<email>nirmoy.das@amd.com</email>
</author>
<published>2021-02-15T20:26:45Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=98d28ac2f511a29d608326e50e3b1061ec18e9f3'/>
<id>urn:sha1:98d28ac2f511a29d608326e50e3b1061ec18e9f3</id>
<content type='text'>
Use debugfs API directly instead of drm middle layer.

This also includes following debugfs file output changes:
1 amdgpu_evict_vram/amdgpu_evict_gtt output will not contain any braces.
  e.g. (0) --&gt; 0
2 amdgpu_gpu_recover output will print return value of
  amdgpu_device_gpu_recover() instead of not so important "gpu recover"
  message.

v2: * checkpatch.pl: use '0444' instead of S_IRUGO.
    * remove S_IFREG from mode.
    * remove mode variable.

Signed-off-by: Nirmoy Das &lt;nirmoy.das@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: enable gfx wave limiting for high priority compute jobs</title>
<updated>2021-02-09T20:27:11Z</updated>
<author>
<name>Nirmoy Das</name>
<email>nirmoy.das@amd.com</email>
</author>
<published>2021-01-27T14:38:30Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=22e4f31529534e8237a5f7422e6d1990bca0e374'/>
<id>urn:sha1:22e4f31529534e8237a5f7422e6d1990bca0e374</id>
<content type='text'>
Enable gfx wave limiting for gfx jobs before pushing high priority
compute jobs so that high priority compute jobs gets more resources
to finish early.

v2: use ring priority instead of job priority.

Signed-off-by: Nirmoy Das &lt;nirmoy.das@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/amdgpu/amdgpu_ib: Provide docs for 'amdgpu_ib_schedule()'s 'job' param</title>
<updated>2020-11-24T17:09:52Z</updated>
<author>
<name>Lee Jones</name>
<email>lee.jones@linaro.org</email>
</author>
<published>2020-11-23T11:18:42Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7ad0c80c5ecbb5e1f8439d181cd660f12139b699'/>
<id>urn:sha1:7ad0c80c5ecbb5e1f8439d181cd660f12139b699</id>
<content type='text'>
Fixes the following W=1 kernel build warning(s):

 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c:127: warning: Function parameter or member 'job' not described in 'amdgpu_ib_schedule'

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: "Christian König" &lt;christian.koenig@amd.com&gt;
Cc: David Airlie &lt;airlied@linux.ie&gt;
Cc: Daniel Vetter &lt;daniel@ffwll.ch&gt;
Cc: Sumit Semwal &lt;sumit.semwal@linaro.org&gt;
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Cc: linux-media@vger.kernel.org
Cc: linaro-mm-sig@lists.linaro.org
Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/amdgpu/amdgpu_ib: Fix some incorrect/incomplete function documentation</title>
<updated>2020-11-13T22:29:46Z</updated>
<author>
<name>Lee Jones</name>
<email>lee.jones@linaro.org</email>
</author>
<published>2020-11-13T13:49:06Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ad8eb024c8721a1056c979a3f4cf62003f6c0fb4'/>
<id>urn:sha1:ad8eb024c8721a1056c979a3f4cf62003f6c0fb4</id>
<content type='text'>
Fixes the following W=1 kernel build warning(s):

 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c:66: warning: Function parameter or member 'adev' not described in 'amdgpu_ib_get'
 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c:66: warning: Function parameter or member 'vm' not described in 'amdgpu_ib_get'
 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c:66: warning: Function parameter or member 'pool_type' not described in 'amdgpu_ib_get'
 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c:66: warning: Excess function parameter 'ring' description in 'amdgpu_ib_get'
 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c:125: warning: Function parameter or member 'ring' not described in 'amdgpu_ib_schedule'
 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c:125: warning: Function parameter or member 'job' not described in 'amdgpu_ib_schedule'
 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c:125: warning: Excess function parameter 'adev' description in 'amdgpu_ib_schedule'

Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: "Christian König" &lt;christian.koenig@amd.com&gt;
Cc: David Airlie &lt;airlied@linux.ie&gt;
Cc: Daniel Vetter &lt;daniel@ffwll.ch&gt;
Cc: Sumit Semwal &lt;sumit.semwal@linaro.org&gt;
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Cc: linux-media@vger.kernel.org
Cc: linaro-mm-sig@lists.linaro.org
Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
