<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c, branch v5.8</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.8</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.8'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2020-05-18T15:24:21Z</updated>
<entry>
<title>drm/amdgpu: Add a UAPI flag for user to call mem_sync</title>
<updated>2020-05-18T15:24:21Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2020-04-28T05:28:43Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=43c8546bcd854806736d8a635a0d696504dd4c21'/>
<id>urn:sha1:43c8546bcd854806736d8a635a0d696504dd4c21</id>
<content type='text'>
When this flag is set in the CS IB flags, it causes
a memory cache flush of the GFX.

v2:
Move new flag to drm_amdgpu_cs_chunk_ib.flags
Bump up UAPI version
Remove condition on job != null to emit mem_sync

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Reviewed-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: cleanup IB pool handling a bit</title>
<updated>2020-04-28T20:20:30Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2020-04-01T09:18:21Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=9ecefb19c3a6626c27ea7ee72d431f22462e1d54'/>
<id>urn:sha1:9ecefb19c3a6626c27ea7ee72d431f22462e1d54</id>
<content type='text'>
Fix the coding style, move and rename the definitions to
better match what they are supposed to be doing.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: check ring type for secure IBs</title>
<updated>2020-04-28T20:20:30Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2020-04-23T20:45:10Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b33f9d70b36889abafec3b638925640ac7c7fe12'/>
<id>urn:sha1:b33f9d70b36889abafec3b638925640ac7c7fe12</id>
<content type='text'>
We don't support secure operation on compute rings at the
moment so reject them.

Reviewed-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Reviewed-by: Aaron Liu &lt;aaron.liu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Fix per-IB secure flag GFX hang</title>
<updated>2020-04-28T20:20:30Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2020-03-09T18:52:06Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f77c9aff85caa9e9b0c2b6fc5be1fc2c76fe02b2'/>
<id>urn:sha1:f77c9aff85caa9e9b0c2b6fc5be1fc2c76fe02b2</id>
<content type='text'>
Since commit "Move to a per-IB secure flag (TMZ)",
we've been seeing hangs in GFX. We need to send
FRAME CONTROL stop/start back-to-back, every time
we flip the TMZ flag. That is, when we transition
from TMZ to non-TMZ we have to send a stop with
TMZ followed by a start with non-TMZ, and
similarly for transitioning from non-TMZ into TMZ.

This patch implements this, thus fixing the GFX
hang.

v1 -&gt; v2:
As suggested by Luben, and accept part of implemetation from this patch:
- Put "secure" closed to the loop and use optimization
- Change "secure" to bool again, and move "secure == -1" out of loop.
v3: Small fixes/optimizations.

Reported-and-Tested-by: Pierre-Eric Pelloux-Prayer &lt;pierre-eric.pelloux-prayer@amd.com&gt;
Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Move to a per-IB secure flag (TMZ)</title>
<updated>2020-04-28T20:20:29Z</updated>
<author>
<name>Luben Tuikov</name>
<email>luben.tuikov@amd.com</email>
</author>
<published>2020-04-22T21:56:56Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0bb5d5b03f78aeb5f87d47877eb15532875c64da'/>
<id>urn:sha1:0bb5d5b03f78aeb5f87d47877eb15532875c64da</id>
<content type='text'>
Move from a per-CS secure flag (TMZ) to a per-IB
secure flag.

Signed-off-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: job is secure iff CS is secure (v5)</title>
<updated>2020-04-28T20:20:28Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2019-08-08T12:05:15Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=cb5fae143d79d255251921066dbf8eae16383639'/>
<id>urn:sha1:cb5fae143d79d255251921066dbf8eae16383639</id>
<content type='text'>
Mark a job as secure, if and only if the command
submission flag has the secure flag set.

v2: fix the null job pointer while in vmid 0
submission.
v3: Context --&gt; Command submission.
v4: filling cs parser with cs-&gt;in.flags
v5: move the job secure flag setting out of amdgpu_cs_submit()

Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: expand the context control interface with trust flag</title>
<updated>2020-04-28T20:20:28Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2020-04-22T21:49:17Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=8350361d2d75882573c7d1af228d7827666e6929'/>
<id>urn:sha1:8350361d2d75882573c7d1af228d7827666e6929</id>
<content type='text'>
This patch expands the context control function to support trusted flag while we
want to set command buffer in trusted mode.

Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: expand the emit tmz interface with trusted flag</title>
<updated>2020-04-28T20:20:28Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2020-03-09T17:53:37Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=155748c912e7063dfcf0cd071e289f4aff152672'/>
<id>urn:sha1:155748c912e7063dfcf0cd071e289f4aff152672</id>
<content type='text'>
This patch expands the emit_tmz function to support trusted flag while we want
to set command buffer in trusted mode.

Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: implement more ib pools (v2)</title>
<updated>2020-04-01T18:44:44Z</updated>
<author>
<name>xinhui pan</name>
<email>xinhui.pan@amd.com</email>
</author>
<published>2020-03-26T00:38:29Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c8e42d57859d5055bfe3313cfd5dc025097b753e'/>
<id>urn:sha1:c8e42d57859d5055bfe3313cfd5dc025097b753e</id>
<content type='text'>
We have three ib pools, they are normal, VM, direct pools.

Any jobs which schedule IBs without dependence on gpu scheduler should
use DIRECT pool.

Any jobs schedule direct VM update IBs should use VM pool.

Any other jobs use NORMAL pool.

v2: squash in coding style fix

Signed-off-by: xinhui pan &lt;xinhui.pan@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/sa: move debugfs init into core amdgpu debugfs</title>
<updated>2020-02-26T19:21:12Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2020-02-04T17:55:38Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=15997544a38f37a5e9d9b56be5783150c3ceeced'/>
<id>urn:sha1:15997544a38f37a5e9d9b56be5783150c3ceeced</id>
<content type='text'>
In order to remove the load and unload drm callbacks,
we need to reorder the init sequence to move all the drm
debugfs file handling.  Do this for SA (sub allocator).

Tested-by: Thomas Zimmermann &lt;tzimmermann@suse.de&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
