<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c, branch v6.17</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v6.17</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v6.17'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2025-07-16T20:14:11Z</updated>
<entry>
<title>drm/amdgpu: track ring state associated with a fence</title>
<updated>2025-07-16T20:14:11Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2025-05-28T01:35:00Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=77cc0da39c7ce203cd3ce6bc5696421947a979d7'/>
<id>urn:sha1:77cc0da39c7ce203cd3ce6bc5696421947a979d7</id>
<content type='text'>
We need to know the wptr and sequence number associated
with a fence so that we can re-emit the unprocessed state
after a ring reset.  Pre-allocate storage space for
the ring buffer contents and add helpers to save off
and re-emit the unprocessed state so that it can be
re-emitted after the queue is reset.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove job parameter from amdgpu_fence_emit()</title>
<updated>2025-06-30T15:57:06Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2025-06-16T15:56:23Z</published>
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<id>urn:sha1:d0c35c84dcfa66947b66ee7a5d8d2d7f52e9c1f3</id>
<content type='text'>
What we actually care about is the amdgpu_fence object
so pass that in explicitly to avoid possible mistakes
in the future.

The job_run_counter handling can be safely removed at this
point as we no longer support job resubmission.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove is_mes_queue flag</title>
<updated>2025-04-08T20:48:21Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2025-03-12T17:47:33Z</published>
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<id>urn:sha1:4220d2c7c41b8ea3fd154dc5678b05575653cba0</id>
<content type='text'>
This was leftover from MES bring up when we had MES
user queues in the kernel.  It's no longer used so
remove it.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix ring timeout issue in gfx10 sr-iov environment</title>
<updated>2025-01-24T14:55:04Z</updated>
<author>
<name>Lin.Cao</name>
<email>lincao12@amd.com</email>
</author>
<published>2025-01-14T09:42:01Z</published>
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<id>urn:sha1:b529093999ff052916b35356dc66eddb83258ead</id>
<content type='text'>
commit 26c95e838e63 ("drm/amdgpu: set the VM pointer to NULL in
amdgpu_job_prepare") set job-&gt;vm as NULL if there is no fence. It will
cause emit switch buffer be skippen if job-&gt;vm set as NULL.

Check job rather than vm could solve this problem.

Fixes: 26c95e838e63 ("drm/amdgpu: set the VM pointer to NULL in amdgpu_job_prepare")
Signed-off-by: Lin.Cao &lt;lincao12@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: always sync the GFX pipe on ctx switch</title>
<updated>2025-01-14T16:06:50Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2024-12-20T15:21:11Z</published>
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<id>urn:sha1:def59436fb0d3ca0f211d14873d0273d69ebb405</id>
<content type='text'>
That is needed to enforce isolation between contexts.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: drop the amdgpu_device argument from amdgpu_ib_free</title>
<updated>2024-12-18T17:17:32Z</updated>
<author>
<name>Pierre-Eric Pelloux-Prayer</name>
<email>pierre-eric.pelloux-prayer@amd.com</email>
</author>
<published>2024-12-06T12:16:14Z</published>
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<id>urn:sha1:0014952b1754b0dba3ea87d2d3b9784fdcec9f95</id>
<content type='text'>
It's unused.

Signed-off-by: Pierre-Eric Pelloux-Prayer &lt;pierre-eric.pelloux-prayer@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: cleanup conditional execution</title>
<updated>2024-03-04T20:59:08Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2023-08-15T06:34:27Z</published>
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<id>urn:sha1:c68cbbfd54c68485ac67b5a04c06feacdce15fec</id>
<content type='text'>
First of all calculating the number of dw to patch into a
conditional execution is not something HW generation specific.
This is just standard ring buffer calculations. While at it also
reduce the BUG_ON() into WARN_ON().

Then instead of a random bit pattern use 0 as default value for
the number of dw skipped, this way it's not mandatory any more
to patch the conditional execution.

And last make the address to check a parameter of the
conditional execution instead of getting this from the ring.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Use seq_puts() instead of seq_printf()</title>
<updated>2023-07-25T17:47:26Z</updated>
<author>
<name>Srinivasan Shanmugam</name>
<email>srinivasan.shanmugam@amd.com</email>
</author>
<published>2023-07-23T06:49:26Z</published>
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<id>urn:sha1:fc8e55f378cf11f3abe25ec5cd67b6fc5e915a96</id>
<content type='text'>
For a constant format without additional arguments, use seq_puts()
instead of seq_printf(). Also, it fixes the following warning.

WARNING: Prefer seq_puts to seq_printf

And other style fixes:

WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
WARNING: Block comments should align the * on each line

Cc: Christian König &lt;christian.koenig@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Srinivasan Shanmugam &lt;srinivasan.shanmugam@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove unnecessary (void*) conversions</title>
<updated>2023-06-09T14:40:12Z</updated>
<author>
<name>Su Hui</name>
<email>suhui@nfschina.com</email>
</author>
<published>2023-05-15T01:34:28Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=109b4d8cfe4279da1cbcbcd99ae54cb2b2aee521'/>
<id>urn:sha1:109b4d8cfe4279da1cbcbcd99ae54cb2b2aee521</id>
<content type='text'>
No need cast (void*) to (struct amdgpu_device *).

Signed-off-by: Su Hui &lt;suhui@nfschina.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: enable the ring and IB test for slave kcq</title>
<updated>2023-06-09T13:42:08Z</updated>
<author>
<name>Shiwu Zhang</name>
<email>shiwu.zhang@amd.com</email>
</author>
<published>2022-06-03T03:08:12Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=147862d00bcf7e23e0a125f910f5db224f7b6722'/>
<id>urn:sha1:147862d00bcf7e23e0a125f910f5db224f7b6722</id>
<content type='text'>
With the mec FW update to utilize the mqd base set by
driver for kcq mapping, slave kcq ring test and IB test
can be re-enabled.

Signed-off-by: Shiwu Zhang &lt;shiwu.zhang@amd.com&gt;
Reviewed-by: Le Ma &lt;Le.Ma@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
