<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c, branch v5.1</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.1</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.1'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2019-02-13T22:47:11Z</updated>
<entry>
<title>drm/amdgpu: cleanup amdgpu_ih_process a bit more</title>
<updated>2019-02-13T22:47:11Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2019-01-09T14:36:29Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e2fb6e0a7a2194f5ef1fada737217aad71e29e4d'/>
<id>urn:sha1:e2fb6e0a7a2194f5ef1fada737217aad71e29e4d</id>
<content type='text'>
Remove the callback and call the dispatcher directly.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: simplify IH programming</title>
<updated>2019-01-14T20:04:47Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-09-18T12:24:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d81f78b440f314e2a551d938e4c509fca16a8fe7'/>
<id>urn:sha1:d81f78b440f314e2a551d938e4c509fca16a8fe7</id>
<content type='text'>
Calculate all the addresses and pointers in amdgpu_ih.c

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add IH ring to ih_get_wptr/ih_set_rptr v2</title>
<updated>2019-01-14T20:04:47Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-09-17T14:13:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=8bb9eb480d032418bd08d0a6a39e4eaa1dec2fb8'/>
<id>urn:sha1:8bb9eb480d032418bd08d0a6a39e4eaa1dec2fb8</id>
<content type='text'>
Let's start to support multiple rings.

v2: decode IV is needed as well

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move more interrupt processing into amdgpu_irq.c</title>
<updated>2018-09-27T02:09:22Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-09-17T13:18:37Z</published>
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<id>urn:sha1:1f8969463bca23327eedadab0fef0d28c9b6f29f</id>
<content type='text'>
Add a callback to amdgpu_ih_process to remove most of the IV logic.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Acked-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: cleanup amdgpu_ih.c</title>
<updated>2018-09-27T02:09:21Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-09-16T18:13:21Z</published>
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<id>urn:sha1:425c31437f26436e17bdb3041a26e9864d18ba13</id>
<content type='text'>
Cleanup amdgpu_ih.c to be able to handle multiple interrupt rings.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Move fault hash table to amdgpu vm</title>
<updated>2018-09-12T21:28:53Z</updated>
<author>
<name>Oak Zeng</name>
<email>Oak.Zeng@amd.com</email>
</author>
<published>2018-09-06T03:51:23Z</published>
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<id>urn:sha1:240cd9a64226e013ac1a608ebf720a1813790196</id>
<content type='text'>
In stead of share one fault hash table per device, make it
per vm. This can avoid inter-process lock issue when fault
hash table is full.

Change-Id: I5d1281b7c41eddc8e26113e010516557588d3708
Signed-off-by: Oak Zeng &lt;Oak.Zeng@amd.com&gt;
Suggested-by: Christian Konig &lt;Christian.Koenig@amd.com&gt;
Suggested-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Reviewed-by: Christian Konig &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: rename amdgpu_wb_* functions</title>
<updated>2017-12-18T15:59:07Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-12-14T21:03:43Z</published>
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<id>urn:sha1:131b4b3686b701079e8fb82eb9384c8acdd3fc72</id>
<content type='text'>
add device for consistency.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Track pending retry faults in IH and VM (v2)</title>
<updated>2017-09-26T18:53:20Z</updated>
<author>
<name>Felix Kuehling</name>
<email>Felix.Kuehling@amd.com</email>
</author>
<published>2017-08-26T06:43:06Z</published>
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<id>urn:sha1:a2f14820e3493145c25095873d4a510a1b25efdc</id>
<content type='text'>
IH tracks pending retry faults in a hash table for fast lookup in
interrupt context. Each VM has a short FIFO of pending VM faults for
processing in a bottom half.

The IH prescreening stage adds retry faults and filters out repeated
retry interrupts to minimize the impact of interrupt storms.

It's the VM's responsibility remove pending faults once they are
handled. For now this is only done when the VM is destroyed.

v2:
- Made the hash table smaller and the FIFO longer. I never want the
  FIFO to fill up, because that would make prescreen take longer.
  128 pending page faults should be enough to keep migrations busy.

Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt; (v1)
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add prescreening stage in IH processing (v2)</title>
<updated>2017-09-26T17:07:04Z</updated>
<author>
<name>Felix Kuehling</name>
<email>Felix.Kuehling@amd.com</email>
</author>
<published>2017-08-26T06:40:45Z</published>
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<id>urn:sha1:00ecd8a27c03b6dd463ab8755dd6d58751d76297</id>
<content type='text'>
To filter out high-frequency interrupts that can be safely ignored.

v2: squash in trivial typo fix for si (Alex)

Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: free the BO in kernel by helper amdgpu_bo_free_kernel()</title>
<updated>2016-09-14T19:10:27Z</updated>
<author>
<name>Junwei Zhang</name>
<email>Jerry.Zhang@amd.com</email>
</author>
<published>2016-09-07T09:14:46Z</published>
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<id>urn:sha1:8640faed5a8a8f55d6decd2d9c9f35ae687b1e4c</id>
<content type='text'>
Signed-off-by: Junwei Zhang &lt;Jerry.Zhang@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
