linux/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h, branch v4.19

drm/amdgpu: Move IH clientid defs to separate file

2018-03-14T20:16:35Z

This is preparation for sharing client ID definitions between amdgpu and amdkfd Signed-off-by: Oak Zeng Reviewed-by: Chunming Zhou Acked-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: rename pas_id to pasid

2018-02-19T19:17:41Z

sed -i "s/pas_id/pasid/g" drivers/gpu/drm/amd/amdgpu/*.c sed -i "s/pas_id/pasid/g" drivers/gpu/drm/amd/amdgpu/*.h Signed-off-by: Christian König Reviewed-by: Chunming Zhou Signed-off-by: Alex Deucher

drm/amdgpu: rename vm_id to vmid

2017-12-27T16:34:02Z

sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.c sed -i "s/vm_id/vmid/g" drivers/gpu/drm/amd/amdgpu/*.h Signed-off-by: Christian König Reviewed-by: Chunming Zhou Signed-off-by: Alex Deucher

drm/amdgpu: Track pending retry faults in IH and VM (v2)

2017-09-26T18:53:20Z

IH tracks pending retry faults in a hash table for fast lookup in interrupt context. Each VM has a short FIFO of pending VM faults for processing in a bottom half. The IH prescreening stage adds retry faults and filters out repeated retry interrupts to minimize the impact of interrupt storms. It's the VM's responsibility remove pending faults once they are handled. For now this is only done when the VM is destroyed. v2: - Made the hash table smaller and the FIFO longer. I never want the FIFO to fill up, because that would make prescreen take longer. 128 pending page faults should be enough to keep migrations busy. Signed-off-by: Felix Kuehling Acked-by: Christian König (v1) Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: add vcn ip block functions (v2)

2017-05-24T21:41:23Z

Fill in the core VCN 1.0 setup functionality. v2: squash in fixup (Alex) Signed-off-by: Leo Liu Acked-by: Chunming Zhou Acked-by: Hawking Zhang Signed-off-by: Alex Deucher

drm/amdgpu: update IH IV ring entry for soc-15

2017-03-30T03:54:36Z

Reflect the new format on soc-15 asics. Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: add clinetid definition for vega10

2017-03-30T03:54:32Z

Signed-off-by: ken Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu/ih: store the full context id

2017-03-30T03:53:37Z

The contextID field (formerly known as src_data) of the IH vector stores client specific information about an interrupt. It was expanded from 32 bits to 128 on newer asics. Expand the src_id field to handle this. Reviewed-by: Harry Wentland Reviewed-by: Christian König Signed-off-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: switch ih handling to two levels (v3)

2017-03-30T03:53:37Z

Newer asics have a two levels of irq ids now: client id - the IP src id - the interrupt src within the IP v2: integrated Christian's comments. v3: fix rebase fail in SI and CIK Signed-off-by: Alex Deucher Signed-off-by: Ken Wang Reviewed-by: Ken Wang Signed-off-by: Alex Deucher

drm/amdgpu: Implement irq interfaces for CGS

2015-08-17T20:50:09Z

This implements the irq src registrar. Reviewed-by: Jammy Zhou Signed-off-by: Chunming Zhou Signed-off-by: Alex Deucher