<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c, branch v4.14</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.14</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.14'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2017-08-17T19:46:08Z</updated>
<entry>
<title>drm/amd/amdgpu: store fragment_size in vm_manager</title>
<updated>2017-08-17T19:46:08Z</updated>
<author>
<name>Roger He</name>
<email>Hongbo.He@amd.com</email>
</author>
<published>2017-08-11T12:00:41Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e618d306ded38dc9d37c04dc37e24bf9d62e9c7b'/>
<id>urn:sha1:e618d306ded38dc9d37c04dc37e24bf9d62e9c7b</id>
<content type='text'>
adds fragment_size in the vm_manager structure and
implements hardware setup for it.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Roger He &lt;Hongbo.He@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: cleanup static CSA handling</title>
<updated>2017-08-17T19:46:05Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-07-31T13:32:40Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0f4b3c68626199cd5ce619e2a3105d44b81f2753'/>
<id>urn:sha1:0f4b3c68626199cd5ce619e2a3105d44b81f2753</id>
<content type='text'>
Move the CSA bo_va from the VM to the fpriv structure.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move vram usage tracking into the vram manager v2</title>
<updated>2017-08-17T19:46:03Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-08-07T15:46:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3c848bb38aca1f7fd23edeb867b89d714a2e6ce2'/>
<id>urn:sha1:3c848bb38aca1f7fd23edeb867b89d714a2e6ce2</id>
<content type='text'>
Looks like a better place for this.

v2: use atomic64_t members instead

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move gtt usage tracking into the gtt manager v2</title>
<updated>2017-08-17T19:46:02Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-08-07T15:11:33Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=9255d77d8cfd714f336a48168a9dada32912b19a'/>
<id>urn:sha1:9255d77d8cfd714f336a48168a9dada32912b19a</id>
<content type='text'>
It doesn't make much sense to count those numbers twice.

v2: use and atomic64_t instead

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Fix KFD initialization for multi-GPU systems</title>
<updated>2017-08-15T18:46:02Z</updated>
<author>
<name>Felix Kuehling</name>
<email>Felix.Kuehling@amd.com</email>
</author>
<published>2017-07-28T20:54:54Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5c33f214db87b3095062a2c3e6e9f106c5ba2932'/>
<id>urn:sha1:5c33f214db87b3095062a2c3e6e9f106c5ba2932</id>
<content type='text'>
kfd2kgd is device-specific, so it should not be a global variable.
Merge amdgpu_amdkfd_load_interface and amdgpu_amdkfd_device_probe
so that it's only needed as a local variable in one function.

Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Reviewed-by: Oded Gabbay &lt;oded.gabbay@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: increase fragmentation size for Vega10 v2</title>
<updated>2017-07-25T20:30:16Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-05-23T16:35:22Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6be7adb37d9bd8af02e53feb72c35e9624165889'/>
<id>urn:sha1:6be7adb37d9bd8af02e53feb72c35e9624165889</id>
<content type='text'>
The fragment bits work differently for Vega10 compared to previous generations.

Increase the fragment size to 2MB for now to better handle that.

v2: handle the hardware setup as well

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-and-tested-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: correct clock info for SRIOV</title>
<updated>2017-07-25T20:29:52Z</updated>
<author>
<name>Xiangliang Yu</name>
<email>Xiangliang.Yu@amd.com</email>
</author>
<published>2017-05-26T09:29:51Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2014bc3febef3a40646fb82ea752df2b20e0cecc'/>
<id>urn:sha1:2014bc3febef3a40646fb82ea752df2b20e0cecc</id>
<content type='text'>
Currently, get clock info from default clk of pm if dpm is disable.
Buf SRIOV doesn't support dpm and pm, can't get anything from pm.
Only get clock info only from default clk of amdgpu for SRIOV.

And driver get pm default clk also from amdgpu default clk and never
be changed by others. So use amdgpu default clk value for SRIOV
and non-dpm cases.

Signed-off-by: Xiangliang Yu &lt;Xiangliang.Yu@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use TTM values instead of MC values for the info queries</title>
<updated>2017-07-14T15:06:23Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-06-30T12:37:02Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=09628c3f68c6ec63c8eba324eb7fd70d46bf3eb2'/>
<id>urn:sha1:09628c3f68c6ec63c8eba324eb7fd70d46bf3eb2</id>
<content type='text'>
Use the TTM values instead of the hardware config here.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Fix the exported always on CU bitmap</title>
<updated>2017-06-29T16:43:49Z</updated>
<author>
<name>Flora Cui</name>
<email>Flora.Cui@amd.com</email>
</author>
<published>2017-06-20T03:08:35Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=dbfe85ea496728ccf7731601084853f760be77d7'/>
<id>urn:sha1:dbfe85ea496728ccf7731601084853f760be77d7</id>
<content type='text'>
Newer asics with 4 SEs are not able to fit the entire bitmask in the
original field, use an array instead.

v2: keep cu_ao_mask for backward compatibility.

Signed-off-by: Flora Cui &lt;Flora.Cui@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add vm context module param</title>
<updated>2017-06-09T15:29:38Z</updated>
<author>
<name>Harish Kasiviswanathan</name>
<email>Harish.Kasiviswanathan@amd.com</email>
</author>
<published>2017-06-09T15:26:57Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=9a4b7d4c769e7513dec8f441de1f521ec4ead4b6'/>
<id>urn:sha1:9a4b7d4c769e7513dec8f441de1f521ec4ead4b6</id>
<content type='text'>
Add VM update mode module param (amdgpu.vm_update_mode) that can used to
control how VM pde/pte are updated for Graphics and Compute.

BIT0 controls Graphics and BIT1 Compute.
 BIT0 [= 0] Graphics updated by SDMA [= 1] by CPU
 BIT1 [= 0] Compute updated by SDMA [= 1] by CPU

By default, only for large BAR system vm_update_mode = 2, indicating
that Graphics VMs will be updated via SDMA and Compute VMs will be
updated via CPU. And for all all other systems (by default)
vm_update_mode = 0

Signed-off-by: Harish Kasiviswanathan &lt;Harish.Kasiviswanathan@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
