linux/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c, branch v4.20

drm/amdgpu: wait for IB test on first device open

2018-11-30T17:12:17Z

Instead of delaying that to the first query. Otherwise we could try to use the SDMA for VM updates before the IB tests are done. Signed-off-by: Christian König Reviewed-by: Chunming Zhou Reviewed-by: Junwei Zhang Signed-off-by: Alex Deucher

drm/amdgpu: added AMD GPU instance counting V2

2018-10-09T21:59:33Z

Count all GPU instances from AMD(including iGPUs and dGPUs) in the system. V2: drop unnecessary initialization for other gpu_info members except mutex Signed-off-by: Evan Quan Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: fix up GDS/GWS/OA shifting

2018-09-19T17:38:48Z

That only worked by pure coincident. Completely remove the shifting and always apply correct PAGE_SHIFT. Signed-off-by: Christian König Acked-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: Add DMCU to firmware query interface

2018-09-14T14:37:43Z

DMCU firmware version can be read using the AMDGPU_INFO ioctl or the amdgpu_firmware_info debugfs entry Signed-off-by: David Francis Reviewed-by: Huang Rui Signed-off-by: Alex Deucher

drm/amdgpu: use IP presence to free uvd and vce handles

2018-09-14T14:36:00Z

Rather than checking the asic type, check whether the UVD or VCE IP blocks exist. This way we don't have to update the check with new asics that use VCN. Signed-off-by: Alex Deucher

drm/amdgpu: add picasso for amdgpu kms

2018-09-14T14:35:30Z

Add picasso for amdgpu kms Signed-off-by: Likun Gao Reviewed-by: Alex Deucher Reviewed-by: Huang Rui Signed-off-by: Alex Deucher

drm/amdgpu: correctly sign extend 48bit addresses v3

2018-09-11T03:41:24Z

Correct sign extend the GMC addresses to 48bit. v2: sign extending turned out easier than thought. v3: clean up the defines and move them into amdgpu_gmc.h as well Signed-off-by: Christian König Reviewed-by: Junwei Zhang Signed-off-by: Alex Deucher

drm/amdgpu: rework ctx entity creation

2018-08-27T16:11:11Z

Use a fixed number of entities for each hardware IP. The number of compute entities is reduced to four, SDMA keeps it two entities and all other engines just expose one entity. Signed-off-by: Christian König Reviewed-by: Chunming Zhou Signed-off-by: Alex Deucher

drm/amdgpu: cleanup HW_IP query

2018-08-27T16:11:10Z

Move the code into a separate function. Signed-off-by: Christian König Reviewed-by: Chunming Zhou Signed-off-by: Alex Deucher

drm/amdgpu: fix VM size reporting on Raven

2018-08-27T16:11:02Z

Raven doesn't have an VCE block and so also no buggy VCE firmware. Signed-off-by: Christian König Reviewed-by: Alex Deucher Reviewed-by: Huang Rui Acked-by: Chunming Zhou Signed-off-by: Alex Deucher