<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c, branch v5.19</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.19</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.19'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2022-05-10T21:53:11Z</updated>
<entry>
<title>drm/amdgpu/mes: fix format specifier for size_t</title>
<updated>2022-05-10T21:53:11Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2022-05-06T15:41:20Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=948ceec7c41574666dd1b78fd6bad4d89cdae452'/>
<id>urn:sha1:948ceec7c41574666dd1b78fd6bad4d89cdae452</id>
<content type='text'>
To avoid a warning on 32 bit.

Reported-by: kernel test robot &lt;lkp@intel.com&gt;
Reviewed-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add mes unmap legacy queue routine</title>
<updated>2022-05-04T14:43:54Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2022-04-13T18:30:37Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=18ee4ce63e0f32cc63dcadb1062e7a3446ead338'/>
<id>urn:sha1:18ee4ce63e0f32cc63dcadb1062e7a3446ead338</id>
<content type='text'>
For mes kiq has been taken over by mes sched, drv can't directly
use mes kiq to unmap queues. drv has to use mes sched api to
unmap legacy queue.

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/mes: Update the doorbell function signatures</title>
<updated>2022-05-04T14:43:53Z</updated>
<author>
<name>Mukul Joshi</name>
<email>mukul.joshi@amd.com</email>
</author>
<published>2020-09-02T19:34:04Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=464913c0dd3bc5f05befa62a38e0f5327736c95f'/>
<id>urn:sha1:464913c0dd3bc5f05befa62a38e0f5327736c95f</id>
<content type='text'>
Update the function signatures for process doorbell allocations
with MES enabled to make them more generic. KFD would need to
access these functions to allocate/free doorbells when MES is
enabled.

Signed-off-by: Mukul Joshi &lt;mukul.joshi@amd.com&gt;
Acked-by: Oak Zeng &lt;Oak.Zeng@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Reviewed-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Reviewed-by: Harish Kasiviswanathan &lt;Harish.Kasiviswanathan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/mes: disable mes sdma queue test</title>
<updated>2022-05-04T14:43:53Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2021-05-26T06:00:11Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=da1c0338f035e51ba718bf446a82121e973f7d1f'/>
<id>urn:sha1:da1c0338f035e51ba718bf446a82121e973f7d1f</id>
<content type='text'>
Disable mes sdma queue test on sienna cichlid+,
for fw hasn't supported to map sdma queue.
The test can be enabled if fw supports.

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/mes: fix vm csa update issue</title>
<updated>2022-05-04T14:43:53Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2022-02-25T09:46:25Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7c18b40e220a6213f3e63e89b761ef3ba056815e'/>
<id>urn:sha1:7c18b40e220a6213f3e63e89b761ef3ba056815e</id>
<content type='text'>
Need reserve VM buffers before update VM csa.

v2: rebase fixes

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/mes: implement mes self test</title>
<updated>2022-05-04T14:43:52Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2020-03-27T16:23:34Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6624d161039734e58fd1f045a5d821d3907f47ab'/>
<id>urn:sha1:6624d161039734e58fd1f045a5d821d3907f47ab</id>
<content type='text'>
Add mes self test to verify its fundamental functionality by
running ring test and ib test of mes kernel queue.

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/mes: add ring/ib test for mes self test</title>
<updated>2022-05-04T14:43:52Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2020-03-27T16:18:26Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=cdb7476d9692c84ba204e0b4172998506b41f270'/>
<id>urn:sha1:cdb7476d9692c84ba204e0b4172998506b41f270</id>
<content type='text'>
Run the ring test and ib test for mes self test.

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/mes: create gang and queues for mes self test</title>
<updated>2022-05-04T14:43:52Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2020-03-27T13:38:42Z</published>
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<id>urn:sha1:f1d93c9c2722a2fc25cdb93b5f99da7252cae6c1</id>
<content type='text'>
Create gang and queues for mes self test.

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/mes: map ctx metadata for mes self test</title>
<updated>2022-05-04T14:43:52Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2020-03-27T13:36:43Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a22f760a02f80d140147de4b504bd7531b268e62'/>
<id>urn:sha1:a22f760a02f80d140147de4b504bd7531b268e62</id>
<content type='text'>
Map ctx metadata for mes self test.

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/mes: add helper functions to alloc/free ctx metadata</title>
<updated>2022-05-04T14:43:52Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2020-03-27T10:11:15Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e3652b0976f383dea912607a404e974632b019b1'/>
<id>urn:sha1:e3652b0976f383dea912607a404e974632b019b1</id>
<content type='text'>
Add the helper functions to allocate/free context metadata.

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
