linux/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c, branch v6.0Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
https://git.shady.money/linux/atom?h=v6.02022-09-14T19:00:34Zdrm/amdgpu/mes: zero the sdma_hqd_mask of 2nd SDMA engine for SDMA 6.0.12022-09-14T19:00:34ZYifan Zhangyifan1.zhang@amd.com2022-08-30T15:18:47Zurn:sha1:0af4ed0c329ebb4cef95fda4fcdbfcdea0255442
there is only one SDMA engine in SDMA 6.0.1, the sdma_hqd_mask has to be
zeroed for the 2nd engine, otherwise MES scheduler will consider 2nd
engine exists and map/unmap SDMA queues to the non-existent engine.
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/mes: ring aggregatged doorbell when mes queue is unmapped2022-07-13T15:25:17ZLe Male.ma@amd.com2020-10-30T03:26:23Zurn:sha1:2d7a1f71837c0922645143cc270b5a4834595544
Ring aggregated doorbel to make unmapped queue scheduled in mes firmware.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/mes: init aggregated doorbell2022-07-13T15:25:17ZLe Male.ma@amd.com2020-10-30T03:24:07Zurn:sha1:0fe6906203d02d050e86b3398219df7bd9e8fe47
Allocate and enable aggregated doorbell.
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/mes: fix bo va unmap issue in mes2022-07-12T14:03:20ZJack XiaoJack.Xiao@amd.com2020-09-09T10:32:36Zurn:sha1:737dad0b5d609f464cae73292de646d3d016ec73
Need reserve buffers before unmap mes ctx bo va.
v2: fix removal of dma_resv_excl_fence() (Alex)
v3: fix dma_resv_usage (Alex)
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/mes: fix mes submission in atomic context2022-07-08T22:25:56ZJack XiaoJack.Xiao@amd.com2022-07-07T12:57:34Zurn:sha1:35ba8850b673050b71b17c1421079031f4fda319
For some cases (accessing registers, unmap legacy queue), it needs
access mes in atomic context. Use spinlock to protect agaist mes
ring buffer race condition.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/mes: Fix an error handling path in amdgpu_mes_self_test()2022-07-05T20:18:07ZJianglei Nieniejianglei2021@163.com2022-07-05T13:46:03Zurn:sha1:c3c483391bb23e9bb8d8a51e54fefcf508b1cce3
if amdgpu_mes_ctx_alloc_meta_data() fails, we should call amdgpu_vm_fini()
to handle amdgpu_vm_init().
Add a new lable before amdgpu_vm_init() and goto this lable when
amdgpu_mes_ctx_alloc_meta_data() fails.
Signed-off-by: Jianglei Nie <niejianglei2021@163.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/mes: add mes register access interface2022-06-30T19:28:18ZJack XiaoJack.Xiao@amd.com2022-06-16T13:23:01Zurn:sha1:adc0e6ab0df390907228abb76c6bf82382089af1
Add mes register access routines:
1. read register
2. write register
3. wait register
4. write and wait register
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add mc wptr addr support for mes2022-06-28T15:24:05ZJack XiaoJack.Xiao@amd.com2022-06-02T08:37:56Zurn:sha1:fe4e9ff9873758ad07e6f7b3088ae3a9dd3ff1b3
MES requires mc wptr address for usermode queues.
Export bo gart address for mc wptr address.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Update mes_v11_api_def.h2022-06-23T21:22:31ZGraham SiderGraham.Sider@amd.com2022-04-28T14:16:16Zurn:sha1:a957995618a8afe3efa2b5746c0a954bbd450882
Update MES API to support oversubscription without aggregated doorbell
for usermode queues.
v2: Change oversubscription_no_aggregated_en to is_kfd_process (align
with MES)
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/mes: fix format specifier for size_t2022-05-10T21:53:11ZAlex Deucheralexander.deucher@amd.com2022-05-06T15:41:20Zurn:sha1:948ceec7c41574666dd1b78fd6bad4d89cdae452
To avoid a warning on 32 bit.
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>