<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h, branch v5.17</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.17</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.17'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2021-11-17T21:58:03Z</updated>
<entry>
<title>drm/amdgpu: use generic fb helpers instead of setting up AMD own's.</title>
<updated>2021-11-17T21:58:03Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2021-10-19T21:26:37Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=087451f372bf76d971184caa258807b7c35aac8f'/>
<id>urn:sha1:087451f372bf76d971184caa258807b7c35aac8f</id>
<content type='text'>
With the shadow buffer support from generic framebuffer emulation, it's
possible now to have runpm kicked when no update for console.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add atomfirmware helper function to query fw cap</title>
<updated>2021-05-20T02:30:03Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2021-05-13T13:46:24Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5968c6a2ba8f98fcdb64c5ef4c7ebce2a98b0f45'/>
<id>urn:sha1:5968c6a2ba8f98fcdb64c5ef4c7ebce2a98b0f45</id>
<content type='text'>
Fimware capability was changed from 16 bits to 32 bits
for atomfirmware. add helper funciton to query firmware
capability and cache the value at early stage.

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: John Clements &lt;john.clements@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Verify bo size can fit framebuffer size on init.</title>
<updated>2021-03-24T03:03:36Z</updated>
<author>
<name>Mark Yacoub</name>
<email>markyacoub@google.com</email>
</author>
<published>2021-03-08T21:36:22Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f258907fdd835e1aed6d666b00cdd0f186676b7c'/>
<id>urn:sha1:f258907fdd835e1aed6d666b00cdd0f186676b7c</id>
<content type='text'>
To initialize the framebuffer, call drm_gem_fb_init_with_funcs which
verifies that the BO size can fit the FB size by calculating the minimum
expected size of each plane.

The bug was caught using igt-gpu-tools test: kms_addfb_basic.too-high
and kms_addfb_basic.bo-too-small

Tested on ChromeOS Zork by turning on the display and running a YT
video.

=== Changes from v1 ===
1. Added new line under declarations.
2. Use C style comment.

Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: "Christian König" &lt;christian.koenig@amd.com&gt;
Cc: Sean Paul &lt;seanpaul@chromium.org&gt;
Signed-off-by: Mark Yacoub &lt;markyacoub@chromium.org&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Store tiling_flags in the framebuffer.</title>
<updated>2020-10-30T18:27:23Z</updated>
<author>
<name>Bas Nieuwenhuizen</name>
<email>bas@basnieuwenhuizen.nl</email>
</author>
<published>2020-09-02T12:22:38Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6eed95b00b45ca241dbec6f684967925bfdfb0e5'/>
<id>urn:sha1:6eed95b00b45ca241dbec6f684967925bfdfb0e5</id>
<content type='text'>
This moves the tiling_flags to the framebuffer creation.
This way the time of the "tiling" decision is the same as it
would be with modifiers.

Signed-off-by: Bas Nieuwenhuizen &lt;bas@basnieuwenhuizen.nl&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Move existing pflip fields into separate struct</title>
<updated>2020-09-15T21:52:39Z</updated>
<author>
<name>Aurabindo Pillai</name>
<email>aurabindo.pillai@amd.com</email>
</author>
<published>2020-08-12T16:40:34Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5d1c59c47997e9955be3a52e261c08e8b40b3902'/>
<id>urn:sha1:5d1c59c47997e9955be3a52e261c08e8b40b3902</id>
<content type='text'>
[Why&amp;How]
To refactor DM IRQ management, all fields used by IRQ is best moved
to a separate struct so that main amdgpu_crtc struct need not be changed
Location of the new struct shall be in DM

Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Signed-off-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: utilize subconnector property for DP through atombios</title>
<updated>2020-08-11T12:19:41Z</updated>
<author>
<name>Oleg Vasilev</name>
<email>oleg.vasilev@intel.com</email>
</author>
<published>2020-04-24T12:50:54Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=65bf2cf95d3ade4b56c35b17bb955a64b7f4b019'/>
<id>urn:sha1:65bf2cf95d3ade4b56c35b17bb955a64b7f4b019</id>
<content type='text'>
Since DP-specific information is stored in driver's structures, every
driver needs to implement subconnector property by itself.

v2: rebase

v3: renamed a function call

Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: Christian König &lt;christian.koenig@amd.com&gt;
Cc: David (ChunMing) Zhou &lt;David1.Zhou@amd.com&gt;
Cc: amd-gfx@lists.freedesktop.org
Signed-off-by: Jeevan B &lt;jeevan.b@intel.com&gt;
Signed-off-by: Oleg Vasilev &lt;oleg.vasilev@intel.com&gt;
Reviewed-by: Emil Velikov &lt;emil.velikov@collabora.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Maarten Lankhorst &lt;maarten.lankhorst@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/1587732655-17544-4-git-send-email-jeevan.b@intel.com
</content>
</entry>
<entry>
<title>drm/amdgpu: Convert to struct drm_crtc_helper_funcs.get_scanout_position()</title>
<updated>2020-02-13T12:08:13Z</updated>
<author>
<name>Thomas Zimmermann</name>
<email>tzimmermann@suse.de</email>
</author>
<published>2020-01-23T13:59:25Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ea702333e56766a7def0023bf78f43d3a81f56c5'/>
<id>urn:sha1:ea702333e56766a7def0023bf78f43d3a81f56c5</id>
<content type='text'>
The callback struct drm_driver.get_scanout_position() is deprecated in
favor of struct drm_crtc_helper_funcs.get_scanout_position(). Convert
amdgpu over.

Signed-off-by: Thomas Zimmermann &lt;tzimmermann@suse.de&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20200123135943.24140-5-tzimmermann@suse.de
</content>
</entry>
<entry>
<title>drm/amd/display: Switch the custom "max bpc" property to the DRM prop</title>
<updated>2019-05-24T17:25:56Z</updated>
<author>
<name>Nicholas Kazlauskas</name>
<email>nicholas.kazlauskas@amd.com</email>
</author>
<published>2019-05-22T16:00:54Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1825fd34e8ed026911c6de6d7be7bd2d1ff8101a'/>
<id>urn:sha1:1825fd34e8ed026911c6de6d7be7bd2d1ff8101a</id>
<content type='text'>
[Why]
The custom "max bpc" property was added to limit color depth while the
DRM one was still being merged. It's been a few kernel versions since
then and this TODO was still sticking around.

[How]
Attach the DRM max bpc property to the connector and drop all of our
custom property management. Set the max bpc to 8 by default since
DRM defaults to the max in the range which would be 16 in this case.

No behavioral changes are intended with this patch, it should just be
a refactor.

v2: Don't force 8bpc when no state is given

Cc: Leo Li &lt;sunpeng.li@amd.com&gt;
Cc: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Remove semicolon from to_dm_plane_state definition</title>
<updated>2019-04-10T18:53:27Z</updated>
<author>
<name>Nicholas Kazlauskas</name>
<email>nicholas.kazlauskas@amd.com</email>
</author>
<published>2019-03-25T19:27:01Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3d12beb319c4efa18d55454096cc523108320d17'/>
<id>urn:sha1:3d12beb319c4efa18d55454096cc523108320d17</id>
<content type='text'>
The extra ; in the macro definition creates an empty statement
preventing any variable declarations from occuring after
any use of to_dm_plane_state(...).

Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Reviewed-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Rework vrr flip throttling for late vblank irq.</title>
<updated>2019-04-03T15:00:33Z</updated>
<author>
<name>Mario Kleiner</name>
<email>mario.kleiner.de@gmail.com</email>
</author>
<published>2019-04-02T22:00:06Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=fdd1fe57c00ef96c8a8ab6e5eab03d248deecca6'/>
<id>urn:sha1:fdd1fe57c00ef96c8a8ab6e5eab03d248deecca6</id>
<content type='text'>
For throttling to work correctly, we always need a baseline vblank
count last_flip_vblank that increments at start of front-porch.

This is the case for drm_crtc_vblank_count() in non-VRR mode, where
the vblank irq fires at start of front-porch and triggers DRM core
vblank handling, but it is no longer the case in VRR mode, where
core vblank handling is done later, after end of front-porch.

Therefore drm_crtc_vblank_count() is no longer useful for this.
We also can't use drm_crtc_accurate_vblank_count(), as that would
screw up vblank timestamps in VRR mode when called in front-porch.

To solve this, use the cooked hardware vblank counter returned by
amdgpu_get_vblank_counter_kms() instead, as that one is cooked to
always increment at start of front-porch, independent of when
vblank related irq's fire.

This patch allows vblank irq handling to happen anywhere within
vblank of even after it, without a negative impact on flip
throttling, so followup patches can shift the vblank core
handling trigger point wherever they need it.

Signed-off-by: Mario Kleiner &lt;mario.kleiner.de@gmail.com&gt;
Reviewed-by: Nicholas Kazlauskas &lt;Nicholas.Kazlauskas@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
