<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c, branch v6.8</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v6.8</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v6.8'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2023-12-14T20:25:48Z</updated>
<entry>
<title>drm/amdgpu: fix ftrace event amdgpu_bo_move always move on same heap</title>
<updated>2023-12-14T20:25:48Z</updated>
<author>
<name>Wang, Beyond</name>
<email>Wang.Beyond@amd.com</email>
</author>
<published>2023-12-12T13:03:04Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=94aeb4117343d072e3a35b9595bcbfc0058ee724'/>
<id>urn:sha1:94aeb4117343d072e3a35b9595bcbfc0058ee724</id>
<content type='text'>
Issue: during evict or validate happened on amdgpu_bo, the 'from' and
'to' is always same in ftrace event of amdgpu_bo_move

where calling the 'trace_amdgpu_bo_move', the comment says move_notify
is called before move happens, but actually it is called after move
happens, here the new_mem is same as bo-&gt;resource

Fix: move trace_amdgpu_bo_move from move_notify to amdgpu_bo_move

Signed-off-by: Wang, Beyond &lt;Wang.Beyond@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: warn when there are still mappings when a BO is destroyed v2</title>
<updated>2023-12-13T21:33:02Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2023-12-04T14:51:50Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=65d2765d6291a49d5cdfc0fd88ba5689ed27dbe2'/>
<id>urn:sha1:65d2765d6291a49d5cdfc0fd88ba5689ed27dbe2</id>
<content type='text'>
This can only happen when there is a reference counting bug.

v2: fix typo

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix AGP addressing when GART is not at 0</title>
<updated>2023-11-29T21:49:22Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2023-11-10T14:39:18Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ca0b006939f9701ab2e14a08ed9ef77a8014d2c5'/>
<id>urn:sha1:ca0b006939f9701ab2e14a08ed9ef77a8014d2c5</id>
<content type='text'>
This worked by luck if the GART aperture ended up at 0.  When
we ended up moving GART on some chips, the GART aperture ended
up offsetting the AGP address since the resource-&gt;start is
a GART offset, not an MC address.  Fix this by moving the AGP
address setup into amdgpu_bo_gpu_offset_no_check().

v2: check mem_type before checking agp
v3: check if the ttm bo has a ttm_tt allocated yet

Fixes: 67318cb84341 ("drm/amdgpu/gmc11: set gart placement GC11")
Tested-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Reported-by: Jesse Zhang &lt;Jesse.Zhang@amd.com&gt;
Reported-by: Yifan Zhang &lt;yifan1.zhang@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: christian.koenig@amd.com
Cc: mario.limonciello@amd.com
</content>
</entry>
<entry>
<title>drm/amdgpu: fix AGP init order</title>
<updated>2023-11-09T21:59:46Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2023-11-07T19:07:44Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=bff3315ba8b1d81655743136bfc38514e820a739'/>
<id>urn:sha1:bff3315ba8b1d81655743136bfc38514e820a739</id>
<content type='text'>
The default AGP settings were overwriting the IP selected
ones since the default was getting set after the IP ones
were selected.

Fixes: de59b69932e6 ("drm/amdgpu/gmc: set a default disable value for AGP")
Link: https://lists.freedesktop.org/archives/amd-gfx/2023-November/100966.html
Tested-by: Mikhail Gavrilov &lt;mikhail.v.gavrilov@gmail.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: Mikhail Gavrilov &lt;mikhail.v.gavrilov@gmail.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/gmc: set a default disable value for AGP</title>
<updated>2023-09-26T21:00:22Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2023-09-20T17:27:58Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=de59b69932e64d77445d973a101d81d6e7e670c6'/>
<id>urn:sha1:de59b69932e64d77445d973a101d81d6e7e670c6</id>
<content type='text'>
To disable AGP, the start needs to be set to a higher
value than the end.  Set a default disable value for
the AGP aperture and allow the IP specific GMC code
to enable it selectively be calling amdgpu_gmc_agp_location().

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd: Simplify the bo size check funciton</title>
<updated>2023-08-30T19:51:16Z</updated>
<author>
<name>Ma Jun</name>
<email>Jun.Ma2@amd.com</email>
</author>
<published>2023-08-25T03:11:51Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=8f9a9a09af24f975ffd6e18b22c4ee8f86bbc01f'/>
<id>urn:sha1:8f9a9a09af24f975ffd6e18b22c4ee8f86bbc01f</id>
<content type='text'>
Simplify the code logic of size check function amdgpu_bo_validate_size

Signed-off-by: Ma Jun &lt;Jun.Ma2@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: accommodate DOMAIN/PL_DOORBELL</title>
<updated>2023-08-07T21:14:06Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2023-07-14T13:11:26Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=dc3499c71d3618130d9c6675e4de1e3562c17125'/>
<id>urn:sha1:dc3499c71d3618130d9c6675e4de1e3562c17125</id>
<content type='text'>
This patch adds changes:
- to accommodate the new GEM domain for DOORBELLs
- to accommodate the new TTM PL for DOORBELLs

in order to manage doorbell pages as GEM object.

V2: Addressed reviwe comments from Christian
    - drop the doorbell changes for pinning/unpinning
    - drop the doorbell changes for dma-buf map
    - drop the doorbell changes for sgt
    - no need to handle TTM_PL_FLAG_CONTIGUOUS for doorbell
    - add caching type for doorbell

V3: - Removed unrelated empty line (Christian)
    - Add PL_DOORBELL in mem_type_to_domain() as well (Alex)

Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: Christian Koenig &lt;christian.koenig@amd.com&gt;
Reviewed-by: Christian Koenig &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Shashank Sharma &lt;shashank.sharma@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add VISIBLE info in amdgpu_bo_print_info</title>
<updated>2023-07-25T17:47:26Z</updated>
<author>
<name>Pierre-Eric Pelloux-Prayer</name>
<email>pierre-eric.pelloux-prayer@amd.com</email>
</author>
<published>2023-06-21T08:42:07Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=818c158fd4e43d07f29cb7eb1a6d0c06a881844f'/>
<id>urn:sha1:818c158fd4e43d07f29cb7eb1a6d0c06a881844f</id>
<content type='text'>
This allows tools to distinguish between VRAM and visible VRAM.

Use the opportunity to fix locking before accessing bo.

v2: squash in unused variable fix

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Pierre-Eric Pelloux-Prayer &lt;pierre-eric.pelloux-prayer@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: make sure that BOs have a backing store</title>
<updated>2023-06-15T15:06:59Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2023-06-05T09:11:22Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ca0b954a4315ca2228001c439ae1062561c81989'/>
<id>urn:sha1:ca0b954a4315ca2228001c439ae1062561c81989</id>
<content type='text'>
It's perfectly possible that the BO is about to be destroyed and doesn't
have a backing store associated with it.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Acked-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Tested-by: Mikhail Gavrilov &lt;mikhail.v.gavrilov@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Revert "drm/amdgpu: remove TOPDOWN flags when allocating VRAM in large bar system"</title>
<updated>2023-06-15T14:43:36Z</updated>
<author>
<name>Arunpravin Paneer Selvam</name>
<email>Arunpravin.PaneerSelvam@amd.com</email>
</author>
<published>2023-06-09T13:18:41Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=59eddd4e215afc05f0610ebabfa05d4b099e5c13'/>
<id>urn:sha1:59eddd4e215afc05f0610ebabfa05d4b099e5c13</id>
<content type='text'>
This reverts commit c105518679b6e87232874ffc989ec403bee59664.

This patch disables the TOPDOWN flag for APU and few dGPU cards
which has the VRAM size equal to the BAR size.

When we enable the TOPDOWN flag, we get the free blocks at
the highest available memory region and we don't split the
lower order blocks. This change is required to keep off
the fragmentation related issues particularly in ASIC
which has VRAM space &lt;= 500MiB

Hence, we are reverting this patch.

Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2270
Signed-off-by: Arunpravin Paneer Selvam &lt;Arunpravin.PaneerSelvam@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
