linux/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c, branch v4.19

drm/amdgpu: implement harvesting support for UVD 7.2 (v3)

2018-07-27T14:07:44Z

Properly handle cases where one or more instance of the IP block may be harvested. v2: make sure ip_num_rings is initialized amdgpu_queue_mgr.c v3: rebase on Christian's UVD changes, drop unused var Reviewed-by: James Zhu Signed-off-by: Alex Deucher

drm/amdgpu: expose only the first UVD instance for now

2018-07-25T20:05:32Z

Going to completely rework the context to ring mapping with Nayan's GSoC work, but for now just stopping to expose the second UVD instance should do it. Signed-off-by: Christian König Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: add AMDGPU_HW_IP_VCN_JPEG to queue mgr

2018-06-15T17:20:40Z

Add AMDGPU_HW_IP_VCN_JPEG to queue mgr Signed-off-by: Boyuan Zhang Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu/vg20:Enable 2nd instance queue maping for uvd 7.2

2018-05-18T21:08:14Z

Enable 2nd instance uvd queue maping for uvd 7.2. For user, only one UVD instance presents. there is two rings for uvd decode, and 4 rings for uvd encode. Signed-off-by: James Zhu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu/vg20:Restruct uvd to support multiple uvds

2018-05-18T21:08:12Z

Vega20 has dual-UVD. Need Restruct amdgpu_device::uvd to support multiple uvds. There are no any logical changes here. Signed-off-by: James Zhu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: Downgrade DRM_ERROR to DRM_DEBUG in amdgpu_queue_mgr_map

2017-12-06T17:48:06Z

Prevent buggy userspace from spamming dmesg. Reviewed-by: Alex Deucher Reviewed-by: Christian König Signed-off-by: Michel Dänzer Signed-off-by: Alex Deucher

drm/amdgpu: Use unsigned ring indices in amdgpu_queue_mgr_map

2017-11-28T22:44:14Z

This matches the corresponding UAPI fields. Treating the ring index as signed could result in accessing random unrelated memory if the MSB was set. Fixes: effd924d2f3b ("drm/amdgpu: untie user ring ids from kernel ring ids v6") Cc: stable@vger.kernel.org Reviewed-by: Alex Deucher Reviewed-by: Christian König Signed-off-by: Michel Dänzer Signed-off-by: Alex Deucher

drm/amdgpu: map compute rings by least recently used pipe

2017-09-28T20:03:22Z

This patch provides a guarantee that the first n queues allocated by an application will be on different pipes. Where n is the number of pipes available from the hardware. This helps avoid ring aliasing which can result in work executing in time-sliced mode instead of truly parallel mode. Reviewed-by: Alex Deucher Signed-off-by: Andres Rodriguez Signed-off-by: Alex Deucher

drm/amdgpu: use LRU mapping policy for SDMA engines

2017-05-31T20:49:04Z

Spreading the load across multiple SDMA engines can increase memory transfer performance. Signed-off-by: Andres Rodriguez Reviewed-by: Nicolai Hähnle Signed-off-by: Alex Deucher

drm/amdgpu: guarantee bijective mapping of ring ids for LRU v3

2017-05-31T20:49:03Z

Depending on usage patterns, the current LRU policy may create a non-injective mapping between userspace ring ids and kernel rings. This behaviour is undesired as apps that attempt to fill all HW blocks would be unable to reach some of them. This change forces the LRU policy to create bijective mappings only. v2: compress ring_blacklist v3: simplify amdgpu_ring_is_blacklisted() logic Signed-off-by: Andres Rodriguez Reviewed-by: Nicolai Hähnle Signed-off-by: Alex Deucher