<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c, branch v5.14</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.14</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.14'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2021-07-13T15:48:10Z</updated>
<entry>
<title>drm/amdgpu: Return error if no RAS</title>
<updated>2021-07-13T15:48:10Z</updated>
<author>
<name>Luben Tuikov</name>
<email>luben.tuikov@amd.com</email>
</author>
<published>2021-07-02T22:35:14Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=43a44c5322d1030d8f36ad679307c61f5b4e3716'/>
<id>urn:sha1:43a44c5322d1030d8f36ad679307c61f5b4e3716</id>
<content type='text'>
In amdgpu_ras_query_error_count() return an error
if the device doesn't support RAS. This prevents
that function from having to always set the values
of the integer pointers (if set), and thus
prevents function side effects--always to have to
set values of integers if integer pointers set,
regardless of whether RAS is supported or
not--with this change this side effect is
mitigated.

Also, if no pointers are set, don't count, since
we've no way of reporting the counts.

Also, give this function a kernel-doc.

Cc: Alexander Deucher &lt;Alexander.Deucher@amd.com&gt;
Cc: John Clements &lt;john.clements@amd.com&gt;
Cc: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reported-by: Tom Rix &lt;trix@redhat.com&gt;
Fixes: a46751fbcde505 ("drm/amdgpu: Fix RAS function interface")
Signed-off-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt;
Reviewed-by: Alexander Deucher &lt;Alexander.Deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: message smu to update hbm bad page number</title>
<updated>2021-06-18T21:11:56Z</updated>
<author>
<name>Stanley.Yang</name>
<email>Stanley.Yang@amd.com</email>
</author>
<published>2021-06-11T07:38:50Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=513befa63446cea8d399fd78761fc11ae518143d'/>
<id>urn:sha1:513befa63446cea8d399fd78761fc11ae518143d</id>
<content type='text'>
Use SMU to update the bad pages rather than directly
accessing the EEPROM from the driver.

Signed-off-by: Stanley.Yang &lt;Stanley.Yang@amd.com&gt;
Reviewed-by: John Clements &lt;john.clements@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add vega20 to ras quirk list</title>
<updated>2021-06-18T21:01:35Z</updated>
<author>
<name>Stanley.Yang</name>
<email>Stanley.Yang@amd.com</email>
</author>
<published>2021-06-15T08:26:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e11d5e0d68cb7f1d796a25fac046e64d3696f22f'/>
<id>urn:sha1:e11d5e0d68cb7f1d796a25fac046e64d3696f22f</id>
<content type='text'>
Signed-off-by: Stanley.Yang &lt;Stanley.Yang@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use adev_to_drm macro for consistency (v2)</title>
<updated>2021-06-11T20:03:32Z</updated>
<author>
<name>Guchun Chen</name>
<email>guchun.chen@amd.com</email>
</author>
<published>2021-06-09T09:19:06Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a3fbb0d8102a678486d958c8944400a7d7461090'/>
<id>urn:sha1:a3fbb0d8102a678486d958c8944400a7d7461090</id>
<content type='text'>
Use adev_to_drm() to get to the drm_device pointer.

Signed-off-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Reviewed-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'amd-drm-next-5.14-2021-06-02' of https://gitlab.freedesktop.org/agd5f/linux into drm-next</title>
<updated>2021-06-03T20:13:57Z</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2021-06-03T20:13:56Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5745d647d5563d3e9d32013ad4e5c629acff04d7'/>
<id>urn:sha1:5745d647d5563d3e9d32013ad4e5c629acff04d7</id>
<content type='text'>
amd-drm-next-5.14-2021-06-02:

amdgpu:
- GC/MM register access macro clean up for SR-IOV
- Beige Goby updates
- W=1 Fixes
- Aldebaran fixes
- Misc display fixes
- ACPI ATCS/ATIF handling rework
- SR-IOV fixes
- RAS fixes
- 16bpc fixed point format support
- Initial smartshift support
- RV/PCO power tuning fixes for suspend/resume
- More buffer object subclassing work
- Add new INFO query for additional vbios information
- Add new placement for preemptable SG buffers

amdkfd:
- Misc fixes

radeon:
- W=1 Fixes
- Misc cleanups

UAPI:
- Add new INFO query for additional vbios information
  Useful for debugging vbios related issues.  Proposed umr patch:
  https://patchwork.freedesktop.org/patch/433297/
- 16bpc fixed point format support
  IGT test:
  https://lists.freedesktop.org/archives/igt-dev/2021-May/031507.html
  Proposed Vulkan patch:
  https://github.com/kleinerm/pal/commit/a25d4802074b13a8d5f7edc96ae45469ecbac3c4
- Add a new GEM flag which is only used internally in the kernel driver.  Userspace
  is not allowed to set it.

drm:
- 16bpc fixed point format fourcc

Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;
From: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20210602214009.4553-1-alexander.deucher@amd.com
</content>
</entry>
<entry>
<title>drm/amdgpu: Use delayed work to collect RAS error counters</title>
<updated>2021-05-27T16:23:06Z</updated>
<author>
<name>Luben Tuikov</name>
<email>luben.tuikov@amd.com</email>
</author>
<published>2021-05-21T15:53:09Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=05adfd80cc52e0b4581e65bb5418de5dfd24d105'/>
<id>urn:sha1:05adfd80cc52e0b4581e65bb5418de5dfd24d105</id>
<content type='text'>
On Context Query2 IOCTL return the correctable and
uncorrectable errors in O(1) fashion, from cached
values, and schedule a delayed work function to
calculate and cache them for the next such IOCTL.

v2: Cancel pending delayed work at ras_fini().
v3: Remove conditionals when dealing with delayed
    work manipulation as they're inherently racy.

Cc: Alexander Deucher &lt;Alexander.Deucher@amd.com&gt;
Cc: Christian König &lt;christian.koenig@amd.com&gt;
Cc: John Clements &lt;john.clements@amd.com&gt;
Cc: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt;
Reviewed-by: Alexander Deucher &lt;Alexander.Deucher@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Fix RAS function interface</title>
<updated>2021-05-27T16:22:54Z</updated>
<author>
<name>Luben Tuikov</name>
<email>luben.tuikov@amd.com</email>
</author>
<published>2021-05-19T01:07:17Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a46751fbcde505e6aff8622e17995092c8d86ae4'/>
<id>urn:sha1:a46751fbcde505e6aff8622e17995092c8d86ae4</id>
<content type='text'>
The correctable and uncorrectable errors
are calculated at each invocation of this
function. Therefore, it is highly inefficient to
return just one of them based on a Boolean
input. If the caller wants both, twice the work
would be done. (And this work is O(n^3) on
Vega20.)

Fix this "interface" to simply return what it had
calculated--both values. Let the caller choose
what it wants to record, inspect, use.

Cc: Alexander Deucher &lt;Alexander.Deucher@amd.com&gt;
Cc: John Clements &lt;john.clements@amd.com&gt;
Cc: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt;
Reviewed-by: Alexander Deucher &lt;Alexander.Deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge drm/drm-next into drm-misc-next</title>
<updated>2021-05-22T05:17:05Z</updated>
<author>
<name>Thomas Zimmermann</name>
<email>tzimmermann@suse.de</email>
</author>
<published>2021-05-22T05:17:05Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=304ba5dca49a21e6f4040494c669134787145118'/>
<id>urn:sha1:304ba5dca49a21e6f4040494c669134787145118</id>
<content type='text'>
Backmerging from drm/drm-next to the patches for AMD devices
for v5.14.

Signed-off-by: Thomas Zimmermann &lt;tzimmermann@suse.de&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Split amdgpu_device_fini into early and late</title>
<updated>2021-05-20T03:45:49Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2021-05-12T14:26:34Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=72c8c97b1522ce7ed1789a42fc9828784ebb5e23'/>
<id>urn:sha1:72c8c97b1522ce7ed1789a42fc9828784ebb5e23</id>
<content type='text'>
Some of the stuff in amdgpu_device_fini such as HW interrupts
disable and pending fences finilization must be done right away on
pci_remove while most of the stuff which relates to finilizing and
releasing driver data structures can be kept until
drm_driver.release hook is called, i.e. when the last device
reference is dropped.

v4: Change functions prefix early-&gt;hw and late-&gt;sw

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20210512142648.666476-3-andrey.grodzovsky@amd.com
</content>
</entry>
<entry>
<title>drm/amdgpu: Conditionally reset RAS counters on boot</title>
<updated>2021-05-20T02:38:11Z</updated>
<author>
<name>John Clements</name>
<email>john.clements@amd.com</email>
</author>
<published>2021-05-17T08:36:26Z</published>
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<id>urn:sha1:8f6368a9c92645e72fdd55862aa09821cdb81b43</id>
<content type='text'>
Only clear RAS error counters if perestent EDC harvesting is not supported

Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: John Clements &lt;john.clements@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
