<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c, branch v6.0</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v6.0</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v6.0'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2022-09-13T18:26:59Z</updated>
<entry>
<title>drm/amdgpu: Skip reset error status for psp v13_0_0</title>
<updated>2022-09-13T18:26:59Z</updated>
<author>
<name>Candice Li</name>
<email>candice.li@amd.com</email>
</author>
<published>2022-09-07T07:52:04Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=86875d558b91cb46f43be112799c06ecce60ec1e'/>
<id>urn:sha1:86875d558b91cb46f43be112799c06ecce60ec1e</id>
<content type='text'>
No need to reset error status since only umc ras supported on psp v13_0_0.

Signed-off-by: Candice Li &lt;candice.li@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: support reset flag set for gpu reset</title>
<updated>2022-07-13T15:25:17Z</updated>
<author>
<name>Likun Gao</name>
<email>Likun.Gao@amd.com</email>
</author>
<published>2022-07-08T03:14:05Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f1549c09c520877be211d483d3c6f4e7f77d2588'/>
<id>urn:sha1:f1549c09c520877be211d483d3c6f4e7f77d2588</id>
<content type='text'>
Move reset_context out of gpu recover function to make it configurable
for different reset purpose.
For the reset way of call gpu_recovery sysfs, force to use full reset
method. Otherwise, try soft reset by default if the related ASIC
supportted, if soft reset failed, will use full reset.

Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: skip whole ras bad page framework on sriov</title>
<updated>2022-07-05T20:10:20Z</updated>
<author>
<name>Stanley.Yang</name>
<email>Stanley.Yang@amd.com</email>
</author>
<published>2022-07-04T07:41:39Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e0e146d5567317d6ba7d0169bed55d1d9ea05a61'/>
<id>urn:sha1:e0e146d5567317d6ba7d0169bed55d1d9ea05a61</id>
<content type='text'>
It should not init whole ras bad page framework on sriov guest side
due to it is handled on host side.

Signed-off-by: Stanley.Yang &lt;Stanley.Yang@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Only send ras feature for gfx block</title>
<updated>2022-07-05T20:10:13Z</updated>
<author>
<name>Stanley.Yang</name>
<email>Stanley.Yang@amd.com</email>
</author>
<published>2022-06-23T07:59:46Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=26093ce14b75bb0c4f0088abf2e11c351abc18c3'/>
<id>urn:sha1:26093ce14b75bb0c4f0088abf2e11c351abc18c3</id>
<content type='text'>
GFX is the only IP block that RAS TA needs to program
the hardware when receiving enable_feature command.

Changed from V1:
    remove amdgpu_ras_need_send_ras_feature inline function,
    use GFX RAS block check directly.

Signed-off-by: Stanley.Yang &lt;Stanley.Yang@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Rename amdgpu_device_gpu_recover_imp back to amdgpu_device_gpu_recover</title>
<updated>2022-06-10T19:26:12Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2022-05-17T18:27:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=cf727044144d47c3e8482b9a7775bd3f04a87341'/>
<id>urn:sha1:cf727044144d47c3e8482b9a7775bd3f04a87341</id>
<content type='text'>
We removed the wrapper that was queueing the recover function
into reset domain queue who was using this name.

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/admgpu: Serialize RAS recovery work directly into reset domain queue.</title>
<updated>2022-06-10T19:25:42Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2022-05-17T16:09:27Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=25a2b22e4148b1ac91960e13f4f5de020ed04d05'/>
<id>urn:sha1:25a2b22e4148b1ac91960e13f4f5de020ed04d05</id>
<content type='text'>
Save the extra usless work schedule.

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Resolve RAS GFX error count issue after cold boot on Arcturus</title>
<updated>2022-06-01T19:58:45Z</updated>
<author>
<name>Candice Li</name>
<email>candice.li@amd.com</email>
</author>
<published>2022-06-01T09:10:44Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2a460963350ec6b1534d28d7f943b5f84815aff2'/>
<id>urn:sha1:2a460963350ec6b1534d28d7f943b5f84815aff2</id>
<content type='text'>
Adjust the sequence for ras late init and separate ras reset error status
from query status.

v2: squash in fix from Candice

Signed-off-by: Candice Li &lt;candice.li@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix ras supported check</title>
<updated>2022-06-01T19:58:09Z</updated>
<author>
<name>Stanley.Yang</name>
<email>Stanley.Yang@amd.com</email>
</author>
<published>2022-05-31T10:57:06Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=28caf8c467e2cb98b90a760b65767fa9aaf52ffb'/>
<id>urn:sha1:28caf8c467e2cb98b90a760b65767fa9aaf52ffb</id>
<content type='text'>
Fix aldebaran ras supported check on SRIOV guest side,
the previous check conditicon block all ras feature
on baremetal

Signed-off-by: Stanley.Yang &lt;Stanley.Yang@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: support ras on SRIOV</title>
<updated>2022-05-26T18:56:32Z</updated>
<author>
<name>Stanley.Yang</name>
<email>Stanley.Yang@amd.com</email>
</author>
<published>2022-04-27T04:16:51Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=950d64250fba5fbb8c290f692de8ffdee380726c'/>
<id>urn:sha1:950d64250fba5fbb8c290f692de8ffdee380726c</id>
<content type='text'>
support umc/gfx/sdma ras on guest side

Changed from V1:
    move sriov judgment in amdgpu_ras_interrupt_fatal_error_handler

Signed-off-by: Stanley.Yang &lt;Stanley.Yang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: refine RAS poison consumption handler</title>
<updated>2022-05-10T21:53:12Z</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2022-05-09T09:52:15Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b63ac5d3033976301f296d048c54d584dfb3ac30'/>
<id>urn:sha1:b63ac5d3033976301f296d048c54d584dfb3ac30</id>
<content type='text'>
Qeury ras status before ras poison consumption handling, add more
comment and log.

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-and-tested-by: Mohammad Zafar Ziya &lt;Mohammadzafar.ziya@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
