<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h, branch v6.3</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v6.3</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v6.3'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2023-02-23T22:35:59Z</updated>
<entry>
<title>drm/amdgpu: exclude duplicate pages from UMC RAS UE count</title>
<updated>2023-02-23T22:35:59Z</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2023-02-10T08:33:58Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4d33e0f1340b3d08002ff8f9bcbf256cfdc4f3ba'/>
<id>urn:sha1:4d33e0f1340b3d08002ff8f9bcbf256cfdc4f3ba</id>
<content type='text'>
If a UMC bad page is reserved but not freed by an application, the
application may trigger uncorrectable error repeatly by accessing the page.

v2: add specific function to do the check.
v3: remove duplicate pages, calculate new added bad page number.
v4: reuse save_bad_pages to calculate new added bad page number.

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Stanley.Yang &lt;Stanley.Yang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: allow query error counters for specific IP block</title>
<updated>2023-01-05T16:42:14Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2023-01-03T15:41:10Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4a1c9a444b5e0f276f43f77e1723088bbedb1687'/>
<id>urn:sha1:4a1c9a444b5e0f276f43f77e1723088bbedb1687</id>
<content type='text'>
amdgpu_ras_block_late_init will be invoked in IP
specific ras_late_init call as a common helper for
all the IP blocks.

However, when amdgpu_ras_block_late_init call
amdgpu_ras_query_error_count to query ras error
counters, amdgpu_ras_query_error_count queries
all the IP blocks that support ras query interface.

This results to wrong error counters cached in
software copies when there are ras errors detected
at time zero or warm reset procedure. i.e., in
sdma_ras_late_init phase, it counts on sdma/mmhub
errors, while, in mmhub_ras_late_init phase, it
still counts on sdma/mmhub errors.

The change updates amdgpu_ras_query_error_count
interface to allow query specific ip error counter.
It introduces a new input parameter: query_info. if
query_info is NULL,  it means query all the IP blocks,
otherwise, only query the ip block specified by
query_info.

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: print umc correctable error address</title>
<updated>2022-06-03T20:44:15Z</updated>
<author>
<name>Stanley.Yang</name>
<email>Stanley.Yang@amd.com</email>
</author>
<published>2022-05-20T13:03:09Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=cbd3e8440e2e6a4d83479235c9bf278b89360946'/>
<id>urn:sha1:cbd3e8440e2e6a4d83479235c9bf278b89360946</id>
<content type='text'>
Signed-off-by: Stanley.Yang &lt;Stanley.Yang@amd.com&gt;
Acked-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/pm: support mca_ceumc_addr in ecctable</title>
<updated>2022-06-03T20:43:36Z</updated>
<author>
<name>Stanley.Yang</name>
<email>Stanley.Yang@amd.com</email>
</author>
<published>2022-05-20T10:22:21Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2f6247dad2c56cfe2df3c6e00586ead5ee905b46'/>
<id>urn:sha1:2f6247dad2c56cfe2df3c6e00586ead5ee905b46</id>
<content type='text'>
SMU add a new variable mca_ceumc_addr to record
umc correctable error address in EccInfo table,
driver side add EccInfo_V2_t to support this feature

Signed-off-by: Stanley.Yang &lt;Stanley.Yang@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add RAS fatal error interrupt handler</title>
<updated>2022-04-22T18:50:18Z</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2022-04-19T06:45:09Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b3c76814ce5b043faa2f07108f1c87ed1cbc8cd1'/>
<id>urn:sha1:b3c76814ce5b043faa2f07108f1c87ed1cbc8cd1</id>
<content type='text'>
The fatal error handler is independent from general ras interrupt
handler since there is no related IH ring.

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add RAS poison consumption handler (v2)</title>
<updated>2022-04-22T18:50:13Z</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2022-04-19T03:04:19Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=66f879496121c18c541125d04a444c62f3ca82ad'/>
<id>urn:sha1:66f879496121c18c541125d04a444c62f3ca82ad</id>
<content type='text'>
Add support for general RAS poison consumption handler.

v2: remove callback function for poison consumption.

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/vcn: Add VCN ras error query support</title>
<updated>2022-03-28T16:54:39Z</updated>
<author>
<name>Mohammad Zafar Ziya</name>
<email>Mohammadzafar.ziya@amd.com</email>
</author>
<published>2022-03-23T04:06:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c543dcbe4237e03b23fa40e0fba979cfd8514954'/>
<id>urn:sha1:c543dcbe4237e03b23fa40e0fba979cfd8514954</id>
<content type='text'>
RAS error query support addition for VCN 2.6

V2: removed unused option and corrected comment format
Moved the register definition under header file

V3: poison query status check added.
Removed error query interface

V4: MMSCH poison check option removed, return true/false refactored.

Signed-off-by: Mohammad Zafar Ziya &lt;Mohammadzafar.ziya@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add vcn and jpeg ras support flag</title>
<updated>2022-03-28T16:54:39Z</updated>
<author>
<name>Mohammad Zafar Ziya</name>
<email>Mohammadzafar.ziya@amd.com</email>
</author>
<published>2022-03-17T01:45:42Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a3d63c62bdf06c5a3f8a71c207f13b26fc6030f5'/>
<id>urn:sha1:a3d63c62bdf06c5a3f8a71c207f13b26fc6030f5</id>
<content type='text'>
Add vcn and jpeg ras support options

V2: vcn and jpeg ras flag enabled for aldebaran asic only

V3: vcn and jpeg ras flag disabled for error counter query
Generic poison query interface added
VCN and JPEG ras enabled based on IP version check

V4: vcn and jpeg ras flag moved under ecc flag for dGPU

Signed-off-by: Mohammad Zafar Ziya &lt;Mohammadzafar.ziya@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: message smu to update bad channel info</title>
<updated>2022-03-15T18:25:16Z</updated>
<author>
<name>Stanley.Yang</name>
<email>Stanley.Yang@amd.com</email>
</author>
<published>2022-03-03T09:56:33Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=69691c823531c36c7283ecaa040e99e9c12ece07'/>
<id>urn:sha1:69691c823531c36c7283ecaa040e99e9c12ece07</id>
<content type='text'>
It should notice SMU to update bad channel info when detected
uncorrectable error in UMC block

Signed-off-by: Stanley.Yang &lt;Stanley.Yang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Modify .ras_fini function pointer parameter</title>
<updated>2022-03-02T23:40:05Z</updated>
<author>
<name>yipechai</name>
<email>YiPeng.Chai@amd.com</email>
</author>
<published>2022-02-17T06:52:20Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=01d468d9a420152e4a1270992e69a37ea0c98e04'/>
<id>urn:sha1:01d468d9a420152e4a1270992e69a37ea0c98e04</id>
<content type='text'>
Modify .ras_fini function pointer parameter so that
we can remove redundant intermediate calls in some
ras blocks.

Signed-off-by: yipechai &lt;YiPeng.Chai@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
