linux/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c, branch v4.20

drm/amdgpu: add ring soft recovery v4

2018-08-27T20:10:07Z

Instead of hammering hard on the GPU try a soft recovery first. v2: reorder code a bit v3: increase timeout to 10ms, increment GPU reset counter v4: squash in compile fix (Christian) Signed-off-by: Christian König Reviewed-by: Huang Rui

drm/amdgpu: remove ring lru handling

2018-08-27T16:10:47Z

Not needed any more. Signed-off-by: Christian König Reviewed-by: Chunming Zhou Signed-off-by: Alex Deucher

drm/amdgpu: allow for more flexible priority handling

2018-07-18T21:18:43Z

Allow to call amdgpu_ring_priority_get() after pushing the ring to the scheduler. Signed-off-by: Christian König Reviewed-by: Chunming Zhou Signed-off-by: Alex Deucher

drm/amdgpu: define and add extra dword for jpeg ring

2018-06-15T17:20:37Z

Define extra dword for jpeg ring. Jpeg ring will allocate extra dword to store the patch commands for fixing the known issue. v2: dropping extra_dw for rings other than jpeg. Signed-off-by: Boyuan Zhang Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu/vg20:Restruct uvd.inst to support multiple instances

2018-05-18T21:08:12Z

Vega20 has dual-UVD. Need add multiple instances support for uvd. Restruct uvd.inst, using uvd.inst[0] to replace uvd.inst->. Repurpose amdgpu_ring::me for instance index, and initialize to 0. There are no any logical changes here. Signed-off-by: James Zhu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: add emit_reg_write_reg_wait ring callback

2018-05-15T18:43:13Z

This callback writes a value to a register and then reads back another register and waits for a value in a single operation. Provide a helper function using two operations for engines that don't support this opertion. Reviewed-by: Huang Rui Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amd/amdgpu: Mask rptr as well in ring debugfs

2018-03-01T17:04:17Z

The read/write pointers on sdma4 devices increment beyond the ring size and should be masked. Tested on my Ryzen 2400G. Signed-off-by: Tom St Denis Reviewed-by: Alex Deucher Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: cache the fence to wait for a VMID

2018-02-19T19:19:18Z

Beneficial when a lot of processes are waiting for VMIDs. Signed-off-by: Christian König Reviewed-by: Chunming Zhou Signed-off-by: Alex Deucher

drm/amdgpu: rename amdgpu_wb_* functions

2017-12-18T15:59:07Z

add device for consistency. Acked-by: Christian König Signed-off-by: Alex Deucher

drm: move amd_gpu_scheduler into common location

2017-12-07T16:51:56Z

This moves and renames the AMDGPU scheduler to a common location in DRM in order to facilitate re-use by other drivers. This is mostly a straight forward rename with no code changes. One notable exception is the function to_drm_sched_fence(), which is no longer a inline header function to avoid the need to export the drm_sched_fence_ops_scheduled and drm_sched_fence_ops_finished structures. Reviewed-by: Chunming Zhou Tested-by: Dieter Nützel Acked-by: Alex Deucher Signed-off-by: Lucas Stach Signed-off-by: Alex Deucher