<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c, branch v6.17</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v6.17</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v6.17'/>
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<updated>2025-09-09T20:38:26Z</updated>
<entry>
<title>drm/amdgpu: fix a memory leak in fence cleanup when unloading</title>
<updated>2025-09-09T20:38:26Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2025-09-04T16:35:05Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7838fb5f119191403560eca2e23613380c0e425e'/>
<id>urn:sha1:7838fb5f119191403560eca2e23613380c0e425e</id>
<content type='text'>
Commit b61badd20b44 ("drm/amdgpu: fix usage slab after free")
reordered when amdgpu_fence_driver_sw_fini() was called after
that patch, amdgpu_fence_driver_sw_fini() effectively became
a no-op as the sched entities we never freed because the
ring pointers were already set to NULL.  Remove the NULL
setting.

Reported-by: Lin.Cao &lt;lincao12@amd.com&gt;
Cc: Vitaly Prosyak &lt;vitaly.prosyak@amd.com&gt;
Cc: Christian König &lt;christian.koenig@amd.com&gt;
Fixes: b61badd20b44 ("drm/amdgpu: fix usage slab after free")
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit a525fa37aac36c4591cc8b07ae8957862415fbd5)
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu: track whether a queue is a kernel queue in amdgpu_mqd_prop</title>
<updated>2025-07-28T20:25:04Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2025-06-24T15:22:26Z</published>
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<id>urn:sha1:284d4dfe850e665f0e7d4dfaf4d3d3da76d11fb0</id>
<content type='text'>
Used to to set the MQD appropriately for each queue type.
Kernel queues have additional privileges.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org # 6.16.x
</content>
</entry>
<entry>
<title>drm/amdgpu: move reset support type checks into the caller</title>
<updated>2025-07-17T16:36:56Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2025-07-15T15:55:05Z</published>
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<id>urn:sha1:6ac55eab4fc41e0ea80f9064945e4340f13d8b5c</id>
<content type='text'>
Rather than checking in the callbacks, check if the reset
type is supported in the caller.

Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Increase reset counter only on success</title>
<updated>2025-07-16T20:14:44Z</updated>
<author>
<name>Lijo Lazar</name>
<email>lijo.lazar@amd.com</email>
</author>
<published>2025-07-14T05:07:00Z</published>
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<id>urn:sha1:25c314aa3ec3d30e4ee282540e2096b5c66a2437</id>
<content type='text'>
Increment the reset counter only if soft recovery succeeded. This is
consistent with a ring hard reset behaviour where counter gets
incremented only if hard reset succeeded.

Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: track ring state associated with a fence</title>
<updated>2025-07-16T20:14:11Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2025-05-28T01:35:00Z</published>
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<id>urn:sha1:77cc0da39c7ce203cd3ce6bc5696421947a979d7</id>
<content type='text'>
We need to know the wptr and sequence number associated
with a fence so that we can re-emit the unprocessed state
after a ring reset.  Pre-allocate storage space for
the ring buffer contents and add helpers to save off
and re-emit the unprocessed state so that it can be
re-emitted after the queue is reset.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove is_mes_queue flag</title>
<updated>2025-04-08T20:48:21Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2025-03-12T17:47:33Z</published>
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<id>urn:sha1:4220d2c7c41b8ea3fd154dc5678b05575653cba0</id>
<content type='text'>
This was leftover from MES bring up when we had MES
user queues in the kernel.  It's no longer used so
remove it.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: stop unmapping MQD for kernel queues v3</title>
<updated>2025-03-26T21:45:42Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2025-03-18T15:15:12Z</published>
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<id>urn:sha1:1f86f4125e167aeb343a5b8136996c0569009c6a</id>
<content type='text'>
This looks unnecessary and actually extremely harmful since using kmap()
is not possible while inside the ring reset.

Remove all the extra mapping and unmapping of the MQDs.

v2: also fix debugfs
v3: fix coding style typo

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add support for CPERs on virtualization</title>
<updated>2025-03-05T15:47:03Z</updated>
<author>
<name>Tony Yi</name>
<email>Tony.Yi@amd.com</email>
</author>
<published>2025-02-26T22:03:10Z</published>
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<id>urn:sha1:a91d91b6004796b868374394962331a1322da7ab</id>
<content type='text'>
Add support for CPERs on VFs.

VFs do not receive PMFW messages directly; as such, they need to
query them from the host. To avoid hitting host event guard,
CPER queries need to be rate limited. CPER queries share the same
RAS telemetry buffer as error count query, so a mutex protecting
the shared buffer was added as well.

For readability, the amdgpu_detect_virtualization was refactored
into multiple individual functions.

Signed-off-by: Tony Yi &lt;Tony.Yi@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Introduce cached_rptr and is_guilty callback in amdgpu_ring</title>
<updated>2025-02-25T16:43:59Z</updated>
<author>
<name>Jesse.zhang@amd.com</name>
<email>Jesse.zhang@amd.com</email>
</author>
<published>2025-02-13T02:30:07Z</published>
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<id>urn:sha1:4d3c4f4f7f22670ae7163b5f9bd6cfea28c2efc6</id>
<content type='text'>
This patch introduces the following changes:
- Add `cached_rptr` to the `amdgpu_ring` structure to store the read pointer before a reset.
- Add `is_guilty` callback to the `amdgpu_ring_funcs` structure to check if a ring is guilty of causing a timeout.

Suggested-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add mutex lock for cper ring</title>
<updated>2025-02-17T19:09:30Z</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2025-02-10T07:28:37Z</published>
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<id>urn:sha1:8652920d2c00243e8a8ca91560a30488d95d9a1b</id>
<content type='text'>
Avoid the confliction between read and write of ring buffer.

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
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