linux/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h, branch v4.19

drm/amdgpu: add support for inplace IB patching for MM engines v2

2018-07-27T14:07:41Z

We are going to need that for the second UVD instance on Vega20. v2: rename to patch_cs_in_place Signed-off-by: Christian König Reviewed-and-tested-by: James Zhu Signed-off-by: Alex Deucher

drm/amdgpu: remove ring parameter from amdgpu_job_submit

2018-07-16T21:11:52Z

We know the ring through the entity anyway. Signed-off-by: Christian König Reviewed-by: Junwei Zhang Acked-by: Chunming Zhou Signed-off-by: Alex Deucher

drm/amdgpu: define and add extra dword for jpeg ring

2018-06-15T17:20:37Z

Define extra dword for jpeg ring. Jpeg ring will allocate extra dword to store the patch commands for fixing the known issue. v2: dropping extra_dw for rings other than jpeg. Signed-off-by: Boyuan Zhang Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: define vcn jpeg ring

2018-06-15T17:20:34Z

Add AMDGPU_RING_TYPE_VCN_JPEG ring define Signed-off-by: Boyuan Zhang Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu/vg20:increase 3 rings for AMDGPU_MAX_RINGS

2018-05-18T21:08:12Z

For Vega20, there are two UVD Hardware. One more UVD hardware adds one decode ring and two encode rings. So AMDGPU_MAX_RINGS need increase by 3. Signed-off-by: James Zhu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: optionally do a writeback but don't invalidate TC for IB fences

2018-05-15T18:43:32Z

There is a new IB flag that enables this new behavior. Full invalidation is unnecessary for RELEASE_MEM and doesn't make sense when draw calls from two adjacent gfx IBs run in parallel. This will be the new default for Mesa. v2: bump the version Signed-off-by: Marek Olšák Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: add emit_reg_write_reg_wait ring callback

2018-05-15T18:43:13Z

This callback writes a value to a register and then reads back another register and waits for a value in a single operation. Provide a helper function using two operations for engines that don't support this opertion. Reviewed-by: Huang Rui Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: Add KFD eviction fence

2018-02-07T01:32:35Z

This fence is used by KFD to keep memory resident while user mode queues are enabled. Trying to evict memory will trigger the enable_signaling callback, which starts a KFD eviction, which involves preempting user mode queues before signaling the fence. There is one such fence per process. v2: * Grab a reference to mm_struct * Dereference fence after NULL check * Simplify fence release, no need to signal without anyone waiting * Added signed-off-by Harish, who is the original author of this code v3: * update MAINTAINERS file * change amd_kfd_ prefix to amdkfd_ * remove useless initialization of variable to NULL v4: * set amdkfd_fence_ops to be static * Suggested by: Fengguang Wu Signed-off-by: Harish Kasiviswanathan Signed-off-by: Felix Kuehling Reviewed-by: Oded Gabbay Signed-off-by: Oded Gabbay

drm/amdgpu: Fix header file dependencies

2018-02-07T01:32:32Z

Signed-off-by: Felix Kuehling Reviewed-by: Christian König Signed-off-by: Oded Gabbay

drm/amdgpu: separate PASID mapping from VM flush v2

2018-02-19T19:20:18Z

Stuffing the PASID mapping into the VM flush isn't flexible enough since the PASID mapping changes not as often as we need a VM flush. v2: add missing use of gmc_v7_0_emit_pasid_mapping Signed-off-by: Christian König Reviewed-by: Felix Kuehling Signed-off-by: Alex Deucher