<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h, branch v5.1</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.1</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.1'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2019-01-25T21:15:35Z</updated>
<entry>
<title>drm/amdgpu: add flags to emit_ib interface v2</title>
<updated>2019-01-25T21:15:35Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2019-01-18T10:13:36Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c4c905ec7b8aaeb06331ee875d3cc9b73dfa481f'/>
<id>urn:sha1:c4c905ec7b8aaeb06331ee875d3cc9b73dfa481f</id>
<content type='text'>
Replace the last bool type parameter with a general flags parameter,
to make the last parameter be able to contain more information.

v2: drop setting need_ctx_switch = false

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: increase the MAX ring number</title>
<updated>2018-12-14T20:54:11Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2018-11-21T03:25:53Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1b3f6bc96883f685224b14f04f587643a47109dd'/>
<id>urn:sha1:1b3f6bc96883f685224b14f04f587643a47109dd</id>
<content type='text'>
As two more SDMA page queue rings are added on Vega20.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Oak Zeng &lt;Oak.Zeng@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Modify the argument of emit_ib interface</title>
<updated>2018-11-05T19:21:50Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-10-24T05:37:37Z</published>
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<id>urn:sha1:34955e038a1b313b0f19eeacfb0e22aa6877e11d</id>
<content type='text'>
use the point of struct amdgpu_job as the function
argument instand of vmid, so the other members of
struct amdgpu_job can be visit in emit_ib function.

v2: add a wrapper for getting the VMID
    add the job before the ib on the parameter list.
v3: refine the wrapper name

Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Retire amdgpu_ring.ready flag v4</title>
<updated>2018-11-05T19:21:23Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2018-10-19T20:22:48Z</published>
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<id>urn:sha1:c66ed765a0a97b8900f37d4a71f1d75f52f56eeb</id>
<content type='text'>
Start using drm_gpu_scheduler.ready isntead.

v3:
Add helper function to run ring test and set
sched.ready flag status accordingly, clean explicit
sched.ready sets from the IP specific files.

v4: Add kerneldoc and rebase.

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Move fence SW fallback warning v3</title>
<updated>2018-09-27T02:09:21Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2018-09-25T14:24:16Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=95d7fc4a412aabd3f5b2e1123c3b8faf1a3d8da7'/>
<id>urn:sha1:95d7fc4a412aabd3f5b2e1123c3b8faf1a3d8da7</id>
<content type='text'>
Only print the warning if there was actually some fence processed
from the SW fallback timer.

v2: Add return value to amdgpu_fence_process to let
amdgpu_fence_fallback know fences were actually
processed and then print the warning.

v3: Always return true if seq != last_seq

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Acked-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Revert "drm/amdgpu: remove fence fallback"</title>
<updated>2018-09-27T02:09:13Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2018-09-21T18:48:50Z</published>
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<id>urn:sha1:8c5e13ec6a2c26d31d0551dc382661dc10823be0</id>
<content type='text'>
This reverts commit 9b0df0937a852d299fbe42a5939c9a8a4cc83c55.
This commit breaks KCQ IB test and S3 on Polaris 11.

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove fence fallback</title>
<updated>2018-09-19T17:38:10Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-09-18T08:38:09Z</published>
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<id>urn:sha1:3e14bedc581c3b7b05cd36352d0d47eca0317497</id>
<content type='text'>
DC doesn't seem to have a fallback path either.

So when interrupts doesn't work any more we are pretty much busted no
matter what.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add ring soft recovery v4</title>
<updated>2018-08-27T20:10:07Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-08-21T09:11:36Z</published>
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<id>urn:sha1:7876fa4f55fda4a57348832f4a668279ed2b2fc4</id>
<content type='text'>
Instead of hammering hard on the GPU try a soft recovery first.

v2: reorder code a bit
v3: increase timeout to 10ms, increment GPU reset counter
v4: squash in compile fix (Christian)

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove ring lru handling</title>
<updated>2018-08-27T16:10:47Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-07-16T13:23:15Z</published>
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<id>urn:sha1:86275d090f0196d63245796aa0e3a12fa17e61a5</id>
<content type='text'>
Not needed any more.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move ring macros into amdgpu_ring header</title>
<updated>2018-08-27T16:10:03Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2018-08-03T10:33:06Z</published>
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<id>urn:sha1:0a7845db93b29f773f37d87e9a15ec1c295b1163</id>
<content type='text'>
Demangle amdgpu.h.

Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
