<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h, branch v5.3</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.3</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.3'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2019-06-21T23:59:23Z</updated>
<entry>
<title>drm/amdgpu: add gfx v10 implementation (v10)</title>
<updated>2019-06-21T23:59:23Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2019-03-04T06:41:42Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a644d85a5cd4efbb1eb62751ef8a98a70d9794bc'/>
<id>urn:sha1:a644d85a5cd4efbb1eb62751ef8a98a70d9794bc</id>
<content type='text'>
GFX is the graphics and compute block on the GPU.

v1: add initial gfx v10 implementation (Ray)
v2: convert to new get_vm_pde function in emit_vm_flush (Hawking)
v3: switch to new emit ib interfaces (Hawking)
v4: squash in updates (Alex)
v5: remove unused variables (Alex)
v6: v6: some golden regs moved to vbios (Alex)
v7: squash in some cleanups (Alex)
v8: squash in golden settings update (Alex)
v9: squash in whitespace fixes (Ernst Sjöstrand, Alex)
v10: squash in GDS backup size fix and GDS/GWS/OA removal rebase fixes (Hawking)

Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add new ring interface preempt_ib</title>
<updated>2019-06-21T14:30:49Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-10-31T12:21:55Z</published>
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<id>urn:sha1:692441f2654c80e1452d66aeadf4b00da9ccddc6</id>
<content type='text'>
Used to trigger preemtption

Acked-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add the trailing fence per ring</title>
<updated>2019-06-21T14:30:45Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2019-01-10T06:28:08Z</published>
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<id>urn:sha1:ef3e13238b5f27412651387ac4c210ba2d7ea312</id>
<content type='text'>
The trailing fence for ring is used to track the
completion of preemption.

Acked-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add helper function amdgpu_ring_set_preempt_cond_exec</title>
<updated>2019-06-21T14:30:39Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-10-08T06:55:42Z</published>
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<id>urn:sha1:dfc9847956d55cdd1111711e2a3d9901967b4368</id>
<content type='text'>
can preempt the ring by setting cond_exec to false

Acked-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add no_user_fence flag to ring funcs</title>
<updated>2019-05-24T17:20:51Z</updated>
<author>
<name>Leo Liu</name>
<email>leo.liu@amd.com</email>
</author>
<published>2019-05-08T15:05:11Z</published>
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<id>urn:sha1:120c212518c87ba8b07360a2f42ecdd372817b74</id>
<content type='text'>
So we can generalize the no user fence supported engine

Signed-off-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add flags to emit_ib interface v2</title>
<updated>2019-01-25T21:15:35Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2019-01-18T10:13:36Z</published>
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<id>urn:sha1:c4c905ec7b8aaeb06331ee875d3cc9b73dfa481f</id>
<content type='text'>
Replace the last bool type parameter with a general flags parameter,
to make the last parameter be able to contain more information.

v2: drop setting need_ctx_switch = false

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: increase the MAX ring number</title>
<updated>2018-12-14T20:54:11Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2018-11-21T03:25:53Z</published>
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<id>urn:sha1:1b3f6bc96883f685224b14f04f587643a47109dd</id>
<content type='text'>
As two more SDMA page queue rings are added on Vega20.

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Oak Zeng &lt;Oak.Zeng@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Modify the argument of emit_ib interface</title>
<updated>2018-11-05T19:21:50Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-10-24T05:37:37Z</published>
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<id>urn:sha1:34955e038a1b313b0f19eeacfb0e22aa6877e11d</id>
<content type='text'>
use the point of struct amdgpu_job as the function
argument instand of vmid, so the other members of
struct amdgpu_job can be visit in emit_ib function.

v2: add a wrapper for getting the VMID
    add the job before the ib on the parameter list.
v3: refine the wrapper name

Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Retire amdgpu_ring.ready flag v4</title>
<updated>2018-11-05T19:21:23Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2018-10-19T20:22:48Z</published>
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<id>urn:sha1:c66ed765a0a97b8900f37d4a71f1d75f52f56eeb</id>
<content type='text'>
Start using drm_gpu_scheduler.ready isntead.

v3:
Add helper function to run ring test and set
sched.ready flag status accordingly, clean explicit
sched.ready sets from the IP specific files.

v4: Add kerneldoc and rebase.

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Move fence SW fallback warning v3</title>
<updated>2018-09-27T02:09:21Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2018-09-25T14:24:16Z</published>
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<id>urn:sha1:95d7fc4a412aabd3f5b2e1123c3b8faf1a3d8da7</id>
<content type='text'>
Only print the warning if there was actually some fence processed
from the SW fallback timer.

v2: Add return value to amdgpu_fence_process to let
amdgpu_fence_fallback know fences were actually
processed and then print the warning.

v3: Always return true if seq != last_seq

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Acked-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
