<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h, branch v5.7</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.7</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.7'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2020-03-09T17:51:48Z</updated>
<entry>
<title>drm/amdgpu: remove unused functions</title>
<updated>2020-03-09T17:51:48Z</updated>
<author>
<name>Nirmoy Das</name>
<email>nirmoy.das@amd.com</email>
</author>
<published>2020-02-27T17:26:15Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=552b80d7409da11f344cdd0bced62e6d9375f3fb'/>
<id>urn:sha1:552b80d7409da11f344cdd0bced62e6d9375f3fb</id>
<content type='text'>
AMDGPU statically sets priority for compute queues
at initialization so remove all the functions
responsible for changing compute queue priority dynamically.

Signed-off-by: Nirmoy Das &lt;nirmoy.das@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: set compute queue priority at mqd_init</title>
<updated>2020-03-09T17:51:24Z</updated>
<author>
<name>Nirmoy Das</name>
<email>nirmoy.das@amd.com</email>
</author>
<published>2020-02-27T12:59:08Z</published>
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<id>urn:sha1:33abcb1f5a1719b1c18867e5bf24fb70efe98804</id>
<content type='text'>
We were changing compute ring priority while rings were being used
before every job submission which is not recommended. This patch
sets compute queue priority at mqd initialization for gfx8, gfx9 and
gfx10.

Policy: make queue 0 of each pipe as high priority compute queue

High/normal priority compute sched lists are generated from set of high/normal
priority compute queues. At context creation, entity of compute queue
get a sched list from high or normal priority depending on ctx-&gt;priority

Signed-off-by: Nirmoy Das &lt;nirmoy.das@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/ring: move debugfs init into core amdgpu debugfs</title>
<updated>2020-02-26T19:21:12Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2020-02-25T16:20:18Z</published>
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<id>urn:sha1:fd23cfcc2e8bc7c3bf38e6f81bcf177c8ef0e30a</id>
<content type='text'>
In order to remove the load and unload drm callbacks,
we need to reorder the init sequence to move all the drm
debugfs file handling.  Do this for rings.

Tested-by: Thomas Zimmermann &lt;tzimmermann@suse.de&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/: increase AMDGPU_MAX_RINGS to add 2nd vcn instance</title>
<updated>2019-07-18T19:18:05Z</updated>
<author>
<name>James Zhu</name>
<email>James.Zhu@amd.com</email>
</author>
<published>2019-07-09T16:07:51Z</published>
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<id>urn:sha1:8b75a521c05fbb16c944ef30d0503942c219886d</id>
<content type='text'>
increase AMDGPU_MAX_RINGS to add 2nd vcn instance

Signed-off-by: James Zhu &lt;James.Zhu@amd.com&gt;
Reviewed-by: Leo Liu &lt;leo.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add gfx v10 implementation (v10)</title>
<updated>2019-06-21T23:59:23Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2019-03-04T06:41:42Z</published>
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<id>urn:sha1:a644d85a5cd4efbb1eb62751ef8a98a70d9794bc</id>
<content type='text'>
GFX is the graphics and compute block on the GPU.

v1: add initial gfx v10 implementation (Ray)
v2: convert to new get_vm_pde function in emit_vm_flush (Hawking)
v3: switch to new emit ib interfaces (Hawking)
v4: squash in updates (Alex)
v5: remove unused variables (Alex)
v6: v6: some golden regs moved to vbios (Alex)
v7: squash in some cleanups (Alex)
v8: squash in golden settings update (Alex)
v9: squash in whitespace fixes (Ernst Sjöstrand, Alex)
v10: squash in GDS backup size fix and GDS/GWS/OA removal rebase fixes (Hawking)

Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add new ring interface preempt_ib</title>
<updated>2019-06-21T14:30:49Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-10-31T12:21:55Z</published>
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<id>urn:sha1:692441f2654c80e1452d66aeadf4b00da9ccddc6</id>
<content type='text'>
Used to trigger preemtption

Acked-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add the trailing fence per ring</title>
<updated>2019-06-21T14:30:45Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2019-01-10T06:28:08Z</published>
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<id>urn:sha1:ef3e13238b5f27412651387ac4c210ba2d7ea312</id>
<content type='text'>
The trailing fence for ring is used to track the
completion of preemption.

Acked-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add helper function amdgpu_ring_set_preempt_cond_exec</title>
<updated>2019-06-21T14:30:39Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-10-08T06:55:42Z</published>
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<id>urn:sha1:dfc9847956d55cdd1111711e2a3d9901967b4368</id>
<content type='text'>
can preempt the ring by setting cond_exec to false

Acked-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add no_user_fence flag to ring funcs</title>
<updated>2019-05-24T17:20:51Z</updated>
<author>
<name>Leo Liu</name>
<email>leo.liu@amd.com</email>
</author>
<published>2019-05-08T15:05:11Z</published>
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<id>urn:sha1:120c212518c87ba8b07360a2f42ecdd372817b74</id>
<content type='text'>
So we can generalize the no user fence supported engine

Signed-off-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add flags to emit_ib interface v2</title>
<updated>2019-01-25T21:15:35Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2019-01-18T10:13:36Z</published>
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<id>urn:sha1:c4c905ec7b8aaeb06331ee875d3cc9b73dfa481f</id>
<content type='text'>
Replace the last bool type parameter with a general flags parameter,
to make the last parameter be able to contain more information.

v2: drop setting need_ctx_switch = false

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
