<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h, branch v6.7</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v6.7</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v6.7'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2023-08-31T20:40:40Z</updated>
<entry>
<title>drm/amdgpu: add UMSCH RING TYPE definition</title>
<updated>2023-08-31T20:40:40Z</updated>
<author>
<name>Lang Yu</name>
<email>Lang.Yu@amd.com</email>
</author>
<published>2023-05-10T08:04:17Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1a29f367811b0d9e65d30c5797715cfcb3c68b94'/>
<id>urn:sha1:1a29f367811b0d9e65d30c5797715cfcb3c68b94</id>
<content type='text'>
Add RING TYPE definition for Multi Mdeia User Mode Scheduler.

Signed-off-by: Lang Yu &lt;Lang.Yu@amd.com&gt;
Reviewed-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: Veerabadhran Gopalakrishnan &lt;Veerabadhran.Gopalakrishnan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add VPE RING TYPE definition</title>
<updated>2023-08-31T20:33:09Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2022-04-23T14:15:43Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2d6ea3b07c371ea1d80f6c41cb7b4ce7c5cf3cd4'/>
<id>urn:sha1:2d6ea3b07c371ea1d80f6c41cb7b4ce7c5cf3cd4</id>
<content type='text'>
Add RING TYPE for Video Processing Engine.

Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Clean up errors in amdgpu_ring.h</title>
<updated>2023-08-09T13:43:45Z</updated>
<author>
<name>Ran Sun</name>
<email>sunran001@208suo.com</email>
</author>
<published>2023-08-02T07:28:13Z</published>
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<id>urn:sha1:1b01c010d7e830db8cec9dee7bb919c9fded43a2</id>
<content type='text'>
Fix the following errors reported by checkpatch:

ERROR: spaces required around that ':' (ctx:VxW)

Signed-off-by: Ran Sun &lt;sunran001@208suo.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add amdgpu_error_* debugfs file</title>
<updated>2023-06-15T15:37:54Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2023-04-19T10:51:41Z</published>
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<id>urn:sha1:b13eb02ba8ba7617d41212121891756da31f1d8b</id>
<content type='text'>
This allows us to insert some error codes into the bottom of the pipeline
on an engine.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Modify indirect buffer packages for resubmission</title>
<updated>2023-06-09T16:44:15Z</updated>
<author>
<name>Jiadong Zhu</name>
<email>Jiadong.Zhu@amd.com</email>
</author>
<published>2023-05-25T08:52:55Z</published>
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<id>urn:sha1:8ff865be93e642d0ad66ca7369f42fbe36dc6a90</id>
<content type='text'>
When the preempted IB frame resubmitted to cp, we need to modify the frame
data including:
1. set PRE_RESUME 1 in CONTEXT_CONTROL.
2. use meta data(DE and CE) read from CSA in WRITE_DATA.

Add functions to save the location the first time IBs emitted and callback
to patch the package when resubmission happens.

Signed-off-by: Jiadong Zhu &lt;Jiadong.Zhu@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add partition ID track in ring</title>
<updated>2023-06-09T13:59:30Z</updated>
<author>
<name>James Zhu</name>
<email>James.Zhu@amd.com</email>
</author>
<published>2022-08-15T20:45:12Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=797a0a142ca7f3b823ae1032983111c055bc50fb'/>
<id>urn:sha1:797a0a142ca7f3b823ae1032983111c055bc50fb</id>
<content type='text'>
Keep track partition ID in ring.

Signed-off-by: James Zhu &lt;James.Zhu@amd.com&gt;
Acked-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: increase AMDGPU_MAX_RINGS</title>
<updated>2023-06-09T13:54:05Z</updated>
<author>
<name>Le Ma</name>
<email>le.ma@amd.com</email>
</author>
<published>2023-03-16T03:08:06Z</published>
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<id>urn:sha1:bb0ed57b4450e46de3651b310dcb4273032c3122</id>
<content type='text'>
On newer GPUs, the number of kernel rings are increased.

Signed-off-by: Le Ma &lt;le.ma@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: increase AMDGPU_MAX_HWIP_RINGS</title>
<updated>2023-06-09T13:51:51Z</updated>
<author>
<name>James Zhu</name>
<email>James.Zhu@amd.com</email>
</author>
<published>2023-01-10T14:01:33Z</published>
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<id>urn:sha1:1bd99ca2695a76f15d7f7862d6ef878588e854dc</id>
<content type='text'>
[WA] Increase AMDGPU_MAX_HWIP_RINGS to 64 to support more compute
ring resource. Later need redesign with queue/prirority/scheduler
factors to reduce AMDGPU_MAX_HWIP_RINGS.

Signed-off-by: James Zhu &lt;James.Zhu@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: increase MAX setting to hold more jpeg instances</title>
<updated>2023-06-09T13:51:19Z</updated>
<author>
<name>James Zhu</name>
<email>James.Zhu@amd.com</email>
</author>
<published>2022-12-12T17:29:04Z</published>
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<id>urn:sha1:45ed97ad36b744dfc2754c47cfd4423aab6322a2</id>
<content type='text'>
vcn_v4_0_3 increased jpeg instances,
need increasing MAX resources setting accordlingly.

Signed-off-by: James Zhu &lt;James.Zhu@amd.com&gt;
Acked-by Leo Liu &lt;leo.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: adjust some basic elements for multiple AID case</title>
<updated>2023-06-09T13:43:35Z</updated>
<author>
<name>Le Ma</name>
<email>le.ma@amd.com</email>
</author>
<published>2022-02-23T03:43:01Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=386ea27c3b0bcdd5b5be74bdf26022ab931eae7b'/>
<id>urn:sha1:386ea27c3b0bcdd5b5be74bdf26022ab931eae7b</id>
<content type='text'>
add some elements below:
 - num_aid
 - aid_id for each sdma instance
 - num_inst_per_aid for sdma

and extend macro size below:
 - SDMA_MAX_INSTANCES to 16
 - AMDGPU_MAX_RINGS to 96
 - AMDGPU_MAX_HWIP_RINGS to 32

v2: move aid_id from amdgpu_ring to amdgpu_sdma_instance. (Lijo)

Signed-off-by: Le Ma &lt;le.ma@amd.com&gt;
Acked-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
