<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h, branch v5.0</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.0</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.0'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2018-11-05T19:21:21Z</updated>
<entry>
<title>drm/ttm: initialize globals during device init (v2)</title>
<updated>2018-11-05T19:21:21Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-10-19T14:55:26Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a64f784bb14a56bfdfad2dc397dd67e4564e3a29'/>
<id>urn:sha1:a64f784bb14a56bfdfad2dc397dd67e4564e3a29</id>
<content type='text'>
Make sure that the global BO state is always correctly initialized.

This allows removing all the device code to initialize it.

v2: fix up vbox (Alex)

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Junwei Zhang &lt;Jerry.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/ttm: use a static ttm_mem_global instance</title>
<updated>2018-11-05T19:21:18Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-10-19T11:49:05Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=27eb1fa9130a98edd2b321d4dbce5c8b244ee7af'/>
<id>urn:sha1:27eb1fa9130a98edd2b321d4dbce5c8b244ee7af</id>
<content type='text'>
As the name says we only need one global instance of ttm_mem_global.

Drop all the driver initialization and just use a single exported
instance which is initialized during BO global initialization.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Junwei Zhang &lt;Jerry.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add amdgpu_gmc_get_pde_for_bo helper v2</title>
<updated>2018-08-27T20:19:42Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-08-22T12:11:19Z</published>
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<id>urn:sha1:24a8d289d532003a167b8f52f97c50430db76ca3</id>
<content type='text'>
Helper to get the PDE for a PD/PT.

v2: improve documentation

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Junwei Zhang &lt;Jerry.Zhang@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Keep track of amount of pinned CPU visible VRAM</title>
<updated>2018-07-13T19:46:11Z</updated>
<author>
<name>Michel Dänzer</name>
<email>michel.daenzer@amd.com</email>
</author>
<published>2018-07-11T10:06:31Z</published>
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<id>urn:sha1:ddc21af4d0f37f42b33c54cb69b215997fe5b082</id>
<content type='text'>
Instead of CPU invisible VRAM. Preparation for the following, no
functional change intended.

v2:
* Also change amdgpu_vram_mgr_bo_invisible_size to
  amdgpu_vram_mgr_bo_visible_size, allowing further simplification
  (Christian König)

Cc: stable@vger.kernel.org
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Refactor amdgpu_vram_mgr_bo_invisible_size helper</title>
<updated>2018-06-19T18:51:22Z</updated>
<author>
<name>Michel Dänzer</name>
<email>michel.daenzer@amd.com</email>
</author>
<published>2018-06-12T10:07:33Z</published>
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<id>urn:sha1:5e9244ff585239630f15f8ad8e676bc91a94ca9e</id>
<content type='text'>
Preparation for the following fix, no functional change intended.

Cc: stable@vger.kernel.org
Signed-off-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Free VGA stolen memory as soon as possible.</title>
<updated>2018-05-15T18:43:16Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2018-04-06T19:54:10Z</published>
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<id>urn:sha1:6f752ec2c20c6a575da29d5b297980f376830e6b</id>
<content type='text'>
Reserved VRAM is used to avoid overriding pre OS FB.
Once our display stack takes over we don't need the reserved
VRAM anymore.

v2:
Remove comment, we know actually why we need to reserve the stolen VRAM.
Fix return type for amdgpu_ttm_late_init.
v3:
Return 0 in amdgpu_bo_late_init, rebase on changes to previous patch
v4: rebase
v5:
For GMC9 reserve always just 9M and keep the stolem memory around
until GART table curruption on S3 resume is resolved.

Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use separate status for buffer funcs availability v2</title>
<updated>2018-03-05T20:37:24Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-03-01T10:09:15Z</published>
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<id>urn:sha1:81988f9c3d9907d7df0ea97e8e4842064b88b7b8</id>
<content type='text'>
The ring status can change during GPU reset, but we still need to be
able to schedule TTM buffer moves in the meantime.

Otherwise we can ran into problems because of aborted move/fill
operations during GPU resets.

v2: still check if ring is available during direct submit.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Acked-by: Chunming zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: change amdgpu_ttm_set_active_vram_size</title>
<updated>2018-03-05T20:37:12Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-03-01T10:01:52Z</published>
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<id>urn:sha1:57adc4cef617d7284ac7676e14533268e73e3699</id>
<content type='text'>
Instead of setting the active VRAM size directly provide a the info if
we can use the buffer functions or not.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Acked-by: Chunming zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move some functions into amdgpu_ttm.h</title>
<updated>2018-03-05T20:37:05Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-03-01T09:41:46Z</published>
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<id>urn:sha1:c396ef9bf3172fd57e86df4529b11d563f9ff801</id>
<content type='text'>
Those belong to the TTM handling.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Map all visible VRAM at startup</title>
<updated>2018-02-28T20:38:46Z</updated>
<author>
<name>Amber Lin</name>
<email>Amber.Lin@amd.com</email>
</author>
<published>2018-02-27T15:01:59Z</published>
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<id>urn:sha1:f8f4b9a679e52298b14358db22c37a135e7086ec</id>
<content type='text'>
When using CPU to update page table, we need to kmap all the PDs/PTs after
they are allocated and that requires a TLB shot down on each CPU, which is
quite heavy.

Instead, we map the whole visible VRAM to a kernel address at once. Pages
can be obtained from the offset.

v2: move the mapping base from gmc to amdgpu_mman structure, and the
    implementation in amdgpu_ttm_* functions

Signed-off-by: Amber Lin &lt;Amber.Lin@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
