<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c, branch v4.15</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.15</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.15'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2017-09-26T19:14:13Z</updated>
<entry>
<title>drm/amdgpu/sriov:fix memory leak after gpu reset</title>
<updated>2017-09-26T19:14:13Z</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2017-09-15T06:35:09Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d59c026b7be1dd9ae00b54d1916a90775fe3bdda'/>
<id>urn:sha1:d59c026b7be1dd9ae00b54d1916a90775fe3bdda</id>
<content type='text'>
GPU reset will require all hw doing hw_init thus
ucode_init_bo will be invoked again, which lead to
memory leak

skip the fw_buf allocation during sriov gpu reset to avoid
memory leak.

Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: enable raven to load firmwares by psp at default (v2)</title>
<updated>2017-09-12T18:30:30Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2017-09-04T09:48:27Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=50811c71fa1b7c2f8b422ad532d75a6860f15a8b'/>
<id>urn:sha1:50811c71fa1b7c2f8b422ad532d75a6860f15a8b</id>
<content type='text'>
- v2: share code with CHIP_VEGA10 case

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Junwei Zhang &lt;Jerry.Zhang@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: jt_size was wrongly counted twice</title>
<updated>2017-08-15T18:46:21Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2017-08-10T08:12:45Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=02dc13e450cb9f70a588bebbfcb17826d5d7bc05'/>
<id>urn:sha1:02dc13e450cb9f70a588bebbfcb17826d5d7bc05</id>
<content type='text'>
Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add a parameter to amdgpu_bo_create()</title>
<updated>2017-08-15T18:45:58Z</updated>
<author>
<name>Yong Zhao</name>
<email>Yong.Zhao@amd.com</email>
</author>
<published>2017-07-20T22:49:09Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2046d46db9166bddc84778f0b3477f6d1e9068ea'/>
<id>urn:sha1:2046d46db9166bddc84778f0b3477f6d1e9068ea</id>
<content type='text'>
The parameter init_value contains the value to which we initialized
VRAM bo when AMDGPU_GEM_CREATE_VRAM_CLEARED flag is set.

Signed-off-by: Yong Zhao &lt;Yong.Zhao@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: set firmware loading type as direct by default for raven</title>
<updated>2017-07-14T15:06:13Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2017-07-04T08:14:06Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=342169c42214bd7682f550eccae119e85f09006c'/>
<id>urn:sha1:342169c42214bd7682f550eccae119e85f09006c</id>
<content type='text'>
In previous case, driver can't enable psp via the kernel parameter for raven.
We should open this path and set it as direct by default till psp firmware
loading is workable.

Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Junwei Zhang &lt;Jerry.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add check when no firmware need to load</title>
<updated>2017-07-14T15:05:59Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2017-06-08T01:32:38Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7504938f8e733053c8cf17dd7ac1f28053b8126a'/>
<id>urn:sha1:7504938f8e733053c8cf17dd7ac1f28053b8126a</id>
<content type='text'>
Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add contiguous flag in ucode bo create</title>
<updated>2017-06-15T15:50:26Z</updated>
<author>
<name>horchen</name>
<email>horace.chen@amd.com</email>
</author>
<published>2017-06-09T11:56:48Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=948edf095158db8d51db25527d8ff21cdff7eb35'/>
<id>urn:sha1:948edf095158db8d51db25527d8ff21cdff7eb35</id>
<content type='text'>
Under VF environment, the ucode would be settled to the visible VRAM,
As it would be pinned to the visible VRAM, it's better to add
contiguous flag,otherwise it need to move gpu address during the pin
process. This movement is not necessary.

Signed-off-by: horchen &lt;horace.chen@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add Raven chip id case for ucode</title>
<updated>2017-05-24T21:40:54Z</updated>
<author>
<name>Chunming Zhou</name>
<email>David1.Zhou@amd.com</email>
</author>
<published>2017-05-04T18:54:46Z</published>
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<id>urn:sha1:4456ef4ea67220d04406b1e0709f629f7733b3b5</id>
<content type='text'>
Set the appropriate ucode loading mechanism.  Set to
direct for now.

Signed-off-by: Chunming Zhou &lt;David1.Zhou@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add gpu_info firmware (v3)</title>
<updated>2017-05-24T21:39:35Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-04-27T03:40:37Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=8ae1a33648969531d93008dda508f1715f1fdbf0'/>
<id>urn:sha1:8ae1a33648969531d93008dda508f1715f1fdbf0</id>
<content type='text'>
Add a new gpu info firmware to store gpu specific configuration
data.  This allows us to store hw constants in a unified place.

v2: adjust structure and elements
v3: further restructure

Reviewed-by: Junwei Zhang &lt;Jerry.Zhang@amd.com&gt;
Tested-by: Junwei Zhang &lt;Jerry.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Fix firmware UCODE_ID_STORAGE issue (v2)</title>
<updated>2017-04-28T21:32:14Z</updated>
<author>
<name>Trigger Huang</name>
<email>trigger.huang@amd.com</email>
</author>
<published>2017-04-11T05:56:36Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=bc108ec78e2af5c7a5f6ef27e264b8093bd60e3b'/>
<id>urn:sha1:bc108ec78e2af5c7a5f6ef27e264b8093bd60e3b</id>
<content type='text'>
In Tonga's virtualization environment, for firmware UCODE_ID_STORAGE,
there is no actual firmware data, but we still need alloc a BO and
tell the BO's mc address to HW, or world switch will hang on VFs.

v2: fix coding style (Alex)

Signed-off-by: Trigger Huang &lt;trigger.huang@amd.com&gt;
Reviewed-by: Xiangliang Yu &lt;Xiangliang.Yu@amd.com&gt;
Reviewed-by: Monk Liu &lt;monk.liu@amd.com&gt;
Acked-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
