<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c, branch v5.8</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.8</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.8'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2020-04-13T16:01:50Z</updated>
<entry>
<title>drm/amdgpu: refine ras related message print</title>
<updated>2020-04-13T16:01:50Z</updated>
<author>
<name>Guchun Chen</name>
<email>guchun.chen@amd.com</email>
</author>
<published>2020-04-10T07:51:14Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6952e99cfd52d32098540fe8d9e592828b9e774c'/>
<id>urn:sha1:6952e99cfd52d32098540fe8d9e592828b9e774c</id>
<content type='text'>
Prefix ras related kernel message logging with PCI
device info by replacing DRM_INFO/WARN/ERROR with
dev_info/warn/err. This can clearly tell user about
GPU device information where ras is. And add some
other ras message printing to make it more clear
and friendly as well.

Suggested-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add uncorrectable error count print in UMC ecc irq cb</title>
<updated>2020-04-13T16:01:44Z</updated>
<author>
<name>Guchun Chen</name>
<email>guchun.chen@amd.com</email>
</author>
<published>2020-04-10T03:41:54Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1f3ef0efbacb2aa63e8e3933664192ee27d0d95b'/>
<id>urn:sha1:1f3ef0efbacb2aa63e8e3933664192ee27d0d95b</id>
<content type='text'>
Uncorrectable error count printing is missed when issuing UMC
UE injection. When going to the error count log function in GPU
recover work thread, there is no chance to get correct error count
value by last error injection and print, because the error status
register is automatically cleared after reading in UMC ecc irq
callback. So add such message printing in UMC ecc irq cb to be
consistent with other RAS error interrupt cases.

Signed-off-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: call ras_debugfs_create_all in debugfs_init</title>
<updated>2020-03-10T19:55:11Z</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2020-03-06T04:24:06Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=204eaac625d57d32d8b4c42b57271a359b76db5a'/>
<id>urn:sha1:204eaac625d57d32d8b4c42b57271a359b76db5a</id>
<content type='text'>
and remove each ras IP's own debugfs creation

this is required to fix ras when the driver does not use the drm load
and unload callbacks due to ordering issues with the drm device node.

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Stanley.Yang &lt;Stanley.Yang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: removed GFX RAS support check in UMC ECC callback</title>
<updated>2020-01-07T16:59:37Z</updated>
<author>
<name>John Clements</name>
<email>john.clements@amd.com</email>
</author>
<published>2020-01-03T09:27:48Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=61130c74329695301a1fa80b78fb25873f0221ed'/>
<id>urn:sha1:61130c74329695301a1fa80b78fb25873f0221ed</id>
<content type='text'>
enable GPU recovery in event of uncorrectable UMC error

Signed-off-by: John Clements &lt;john.clements@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: drop useless BACO arg in amdgpu_ras_reset_gpu</title>
<updated>2019-12-18T21:09:06Z</updated>
<author>
<name>Guchun Chen</name>
<email>guchun.chen@amd.com</email>
</author>
<published>2019-12-13T08:46:05Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=619346240932ac86a0f0c42f887827ae759eda47'/>
<id>urn:sha1:619346240932ac86a0f0c42f887827ae759eda47</id>
<content type='text'>
BACO reset mode strategy is determined by latter func when
calling amdgpu_ras_reset_gpu. So not to confuse audience, drop
it.

Signed-off-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add comments in ras interrupt callback</title>
<updated>2019-10-03T14:11:03Z</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2019-09-23T11:10:19Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3d8361b11ca45b329349ec82ad765d059d8b0673'/>
<id>urn:sha1:3d8361b11ca45b329349ec82ad765d059d8b0673</id>
<content type='text'>
add comments to clarify why checking GFX IP BLOCK for each ras interrupt callback

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move umc ras fini to umc block</title>
<updated>2019-10-03T14:11:02Z</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2019-09-18T09:46:42Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=181c93e5ecdb8c8f3bcc74e38adcd668db85c441'/>
<id>urn:sha1:181c93e5ecdb8c8f3bcc74e38adcd668db85c441</id>
<content type='text'>
it's more suitable to put umc ras fini in umc block

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove ih_info parameter of umc_ras_late_init</title>
<updated>2019-10-03T14:11:02Z</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2019-09-12T10:54:33Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=56c54b25c3b60a64d4ffd7b6b2a309b3febcfdd4'/>
<id>urn:sha1:56c54b25c3b60a64d4ffd7b6b2a309b3febcfdd4</id>
<content type='text'>
umc_ras_late_init can get the info by itself

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move umc_ras_if from gmc to umc block</title>
<updated>2019-10-03T14:11:02Z</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2019-09-12T08:34:08Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=03740baab3b574ed40f39bb9eda715bb32045337'/>
<id>urn:sha1:03740baab3b574ed40f39bb9eda715bb32045337</id>
<content type='text'>
umc_ras_if is relevant to umc

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move umc ras irq functions to umc block</title>
<updated>2019-10-03T14:11:01Z</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2019-09-12T03:11:25Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=34cc4fd9ff710f31b172dbb8bdcc3a3ab492fff3'/>
<id>urn:sha1:34cc4fd9ff710f31b172dbb8bdcc3a3ab492fff3</id>
<content type='text'>
move umc ras irq functions from gmc v9 to generic umc block, these
functions are relevant to umc and they can be shared among all
generations of umc

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
