linux/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h, branch v4.19

drm/amdgpu/uvd: UVD entity initialization relys on ring initialization

2018-08-13T22:20:10Z

Entity init should after ring init, as the entity's sched_rq's initialization is in ring init. SWDEV-161495 Signed-off-by: Emily Deng Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: implement harvesting support for UVD 7.2 (v3)

2018-07-27T14:07:44Z

Properly handle cases where one or more instance of the IP block may be harvested. v2: make sure ip_num_rings is initialized amdgpu_queue_mgr.c v3: rebase on Christian's UVD changes, drop unused var Reviewed-by: James Zhu Signed-off-by: Alex Deucher

drm/amdgpu: clean up UVD instance handling v2

2018-07-19T18:56:44Z

The whole handle, filp and entity handling is superfluous here. We should have reviewed that more thoughtfully. It looks like somebody just made the code instance aware without knowing the background. v2: fix one more missed case in amdgpu_uvd_suspend Reviewed-by: Leo Liu Signed-off-by: Christian König Acked-by: Chunming Zhou Signed-off-by: Alex Deucher

drm/amdgpu: remove superflous UVD encode entity

2018-07-19T18:56:44Z

Not sure what that was every used for, but now it is completely unused. Reviewed-by: Leo Liu Signed-off-by: Christian König Acked-by: Chunming Zhou Signed-off-by: Alex Deucher

drm/amdgpu:All UVD instances share one idle_work handle

2018-06-19T18:34:27Z

All UVD instanses have only one dpm control, so it is better to share one idle_work handle. Signed-off-by: James Zhu Reviewed-by: Alex Deucher Reviewed-by: Christian König Tested-by: Stefan Agner Signed-off-by: Alex Deucher

drm/amdgpu/vg20:Restruct uvd to support multiple uvds

2018-05-18T21:08:12Z

Vega20 has dual-UVD. Need Restruct amdgpu_device::uvd to support multiple uvds. There are no any logical changes here. Signed-off-by: James Zhu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm: move amd_gpu_scheduler into common location

2017-12-07T16:51:56Z

This moves and renames the AMDGPU scheduler to a common location in DRM in order to facilitate re-use by other drivers. This is mostly a straight forward rename with no code changes. One notable exception is the function to_drm_sched_fence(), which is no longer a inline header function to avoid the need to export the drm_sched_fence_ops_scheduled and drm_sched_fence_ops_finished structures. Reviewed-by: Chunming Zhou Tested-by: Dieter Nützel Acked-by: Alex Deucher Signed-off-by: Lucas Stach Signed-off-by: Alex Deucher

drm/amd/amdgpu: fix UVD mc offsets

2017-12-06T17:47:22Z

When UVD bo is created, its size is based on the information from firmware header (ucode_size_bytes). The same value should be be used when programming UVD mc controller offsets, otherwise it can happen that (mmUVD_VCPU_CACHE_OFFSET2 + mmUVD_VCPU_CACHE_SIZE2) will point AMDGPU_GPU_PAGE_SIZE bytes after the UVD bo end. Second issue is that when programming the mmUVD_VCPU_CACHE_SIZE0 register, AMDGPU_UVD_FIRMWARE_OFFSET should be taken into account. If it isn't, (mmUVD_VCPU_CACHE_OFFSET2 + mmUVD_VCPU_CACHE_SIZE2) will always point AMDGPU_UVD_FIRMWARE_OFFSET bytes after the UVD bo end. v2: move firmware size calculation into macro definition v3: align firmware size to the gpu page size Reviewed-by: Christian König Signed-off-by: Piotr Redlewski Signed-off-by: Alex Deucher

drm/amdgpu: add uvd enc run queue

2017-03-30T03:53:46Z

Reviewed-by: Christian König Signed-off-by: Leo Liu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: add uvd enc rings

2017-03-30T03:53:45Z

And initialize them Reviewed-by: Christian König Signed-off-by: Leo Liu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher