<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c, branch v4.9</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.9</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.9'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2016-10-04T15:16:00Z</updated>
<entry>
<title>drm/amdgpu/vce: add support for hw config packet (v2)</title>
<updated>2016-10-04T15:16:00Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2016-09-23T21:22:42Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5eeda8a4813459d6d9bb108ac42b1c8acda50cf9'/>
<id>urn:sha1:5eeda8a4813459d6d9bb108ac42b1c8acda50cf9</id>
<content type='text'>
This is needed for proper VCE DPM on some APUs.

v2: fix the asic list

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/vce3: don't forget to tear down some rings</title>
<updated>2016-09-27T17:00:52Z</updated>
<author>
<name>Grazvydas Ignotas</name>
<email>notasas@gmail.com</email>
</author>
<published>2016-09-25T20:34:49Z</published>
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<id>urn:sha1:4cd00d37559badddb9e55851bb07c398ec3607ae</id>
<content type='text'>
We can use .num_rings for that.

Fixes: 6f0359ff7307 ("vce3: add support for third vce ring")
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Grazvydas Ignotas &lt;notasas@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/vce: take all rings into account for idle checks</title>
<updated>2016-09-27T17:00:50Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2016-09-26T19:19:14Z</published>
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<id>urn:sha1:24c5fe56b25eaf05aa2ce1dfebac707c58208ea4</id>
<content type='text'>
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/vce: allow the clock table packet</title>
<updated>2016-09-22T14:24:21Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2016-09-21T18:57:06Z</published>
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<id>urn:sha1:4f827785404f20ad7ca11c5d2d7832630514a280</id>
<content type='text'>
This packet allows the user mode driver to specify
the required performance for specific use cases.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/vce: add common ring callbacks for ib and dma frame size</title>
<updated>2016-09-16T19:53:01Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2016-09-16T15:01:26Z</published>
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<id>urn:sha1:a6f8d7286714363e615561e8aafdf78807fe079d</id>
<content type='text'>
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: bind GTT on demand</title>
<updated>2016-09-14T19:10:30Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2016-09-05T15:00:57Z</published>
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<id>urn:sha1:c855e25090cdafffb87119028eb018030a46dd9e</id>
<content type='text'>
We don't really need the GTT table any more most of the time. So bind it
only on demand.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Acked-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/vce3: add support for third vce ring</title>
<updated>2016-08-25T15:21:51Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2016-08-24T21:15:33Z</published>
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<id>urn:sha1:6f0359ff73076483902de0c17f9649bf55651e2a</id>
<content type='text'>
Not of much use at the moment (we don't really use
the second ring either), but may be useful later.

Reviewed-by: JimQu &lt;Jim.Qu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use memcpy_toio for VCE firmware upload</title>
<updated>2016-08-24T20:25:07Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2016-08-23T09:18:59Z</published>
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<id>urn:sha1:7b4d3e297e8a7d3b82e68231ff077e891c370349</id>
<content type='text'>
Try to be clean here, even when it's a noop on x86.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add destroy session when generate VCE destroy msg.</title>
<updated>2016-07-29T18:37:06Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2016-07-21T12:46:55Z</published>
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<id>urn:sha1:99453a9e814d706d3ccb63deb7879fd9e6681d00</id>
<content type='text'>
Signed-off-by: David Mao &lt;David.Mao@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add a fence timeout for the IB tests v2</title>
<updated>2016-07-29T18:37:04Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2016-07-05T19:07:17Z</published>
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<id>urn:sha1:bbec97aae660adafa5208c5defc54e3cbbe6b129</id>
<content type='text'>
10ms should be enough for now.

v2: fix some typos in CIK code

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Reviewed-by: Edward O'Callaghan &lt;funfunctor@folklore1984.net&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
