<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c, branch v4.14</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.14</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.14'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2017-08-17T19:46:07Z</updated>
<entry>
<title>drm/amdgpu: separate bo_va structure</title>
<updated>2017-08-17T19:46:07Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-08-01T08:51:43Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ec681545afe5a448b43a2fe5c206ee48e19dabb3'/>
<id>urn:sha1:ec681545afe5a448b43a2fe5c206ee48e19dabb3</id>
<content type='text'>
Split that into vm_bo_base and bo_va to allow other uses as well.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: cleanup static CSA handling</title>
<updated>2017-08-17T19:46:05Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-07-31T13:32:40Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0f4b3c68626199cd5ce619e2a3105d44b81f2753'/>
<id>urn:sha1:0f4b3c68626199cd5ce619e2a3105d44b81f2753</id>
<content type='text'>
Move the CSA bo_va from the VM to the fpriv structure.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu:kiq reg access need timeout(v2)</title>
<updated>2017-05-24T21:40:17Z</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2017-05-05T21:30:50Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ff82577a10f405e9e0426facdbdd303143146d9f'/>
<id>urn:sha1:ff82577a10f405e9e0426facdbdd303143146d9f</id>
<content type='text'>
this is to prevent fence forever waiting if FLR occured
during register accessing.

v2:
use define instead of hardcode for the timeout msec

Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Move kiq ring lock out of virt structure</title>
<updated>2017-05-24T21:40:12Z</updated>
<author>
<name>Shaoyun Liu</name>
<email>Shaoyun.Liu@amd.com</email>
</author>
<published>2017-04-28T21:18:26Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=cdf6adb28f79e728389b2e1a5e524504ce710eb6'/>
<id>urn:sha1:cdf6adb28f79e728389b2e1a5e524504ce710eb6</id>
<content type='text'>
The usage of kiq should not depend on the virtualization.

Signed-off-by: Shaoyun Liu &lt;Shaoyun.Liu@amd.com&gt;
Reviewed-by:Andres Rodriquez &lt;andresx7@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/virt: bypass cg and pg setting for SRIOV</title>
<updated>2017-05-24T21:40:03Z</updated>
<author>
<name>Xiangliang Yu</name>
<email>Xiangliang.Yu@amd.com</email>
</author>
<published>2017-04-21T06:01:29Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=213cacefcd5c7815802281445ba503d26e794b77'/>
<id>urn:sha1:213cacefcd5c7815802281445ba503d26e794b77</id>
<content type='text'>
GPU hypervisor cover all settings of CG and PG, so guest doesn't
need to do anything. Bypass it.

Signed-off-by: Frank Min &lt;Frank.Min@amd.com&gt;
Signed-off-by: Xiangliang Yu &lt;Xiangliang.Yu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/virt: add two functions for MM table</title>
<updated>2017-04-28T21:32:58Z</updated>
<author>
<name>Xiangliang Yu</name>
<email>Xiangliang.Yu@amd.com</email>
</author>
<published>2017-04-21T07:40:25Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=904cd3891dd390b109c8146974b47fca78b97c98'/>
<id>urn:sha1:904cd3891dd390b109c8146974b47fca78b97c98</id>
<content type='text'>
Add two functions to allocate &amp; free MM table memory.

Signed-off-by: Xiangliang Yu &lt;Xiangliang.Yu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu:no need to involv HDP in KIQ</title>
<updated>2017-04-06T17:28:04Z</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2017-04-05T08:39:11Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=377e275946340916c74c169c4cb0a39da99704ce'/>
<id>urn:sha1:377e275946340916c74c169c4cb0a39da99704ce</id>
<content type='text'>
1,KIQ won't touch VRAM so no need to involv HDP flush/invalidate at all.
2,According to CP hw designer KIQ better not use any PM4 package lead to wait behave.

Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: separate page table allocation from mapping</title>
<updated>2017-03-30T03:54:00Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-03-13T09:13:37Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=663e4577a5733fab18d601128f54486d78595bc0'/>
<id>urn:sha1:663e4577a5733fab18d601128f54486d78595bc0</id>
<content type='text'>
This makes it easier to implement a replace operation.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Junwei Zhang &lt;Jerry.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu:add lock_reset for SRIOV</title>
<updated>2017-03-30T03:52:46Z</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2017-01-25T07:48:01Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=147b5983bb9b942af1f1d8d9e05d93f97cca312c'/>
<id>urn:sha1:147b5983bb9b942af1f1d8d9e05d93f97cca312c</id>
<content type='text'>
this lock is used for sriov_gpu_reset, only get this mutex
can run into sriov_gpu_reset.

we have couple source triggers gpu_reset for SRIOV:
1) submit timedout and trigger reset voluntarily
2) invalid instruction detected by ENGINE and trigger reset voluntarily
2) hypervisor found world switch hang and trigger flr and notify guest to
   do reset.

all need take care and we need a mutex to protect the consistency of
reset routine.

Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu:change kiq lock name</title>
<updated>2017-03-30T03:52:45Z</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2017-01-25T07:33:56Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ed17c71b3a89d5ef4d8c8053a29a78fa709bb458'/>
<id>urn:sha1:ed17c71b3a89d5ef4d8c8053a29a78fa709bb458</id>
<content type='text'>
Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
