linux/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c, branch v4.15

drm/amdgpu: use irq-safe lock for kiq->ring_lock

2017-11-08T22:55:14Z

This lock is used during register accessing in SRIOV guest. The register accessing could happen both in irq enabled and irq disabled cases. Always use irq-safe lock. Signed-off-by: Pixel Ding Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu/virt: don't dereference undefined 'module' struct

2017-11-03T13:42:28Z

Accessing the THIS_MODULE directly is only possible when modules are enabled, otherwise we get a build failure: drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c: In function 'amdgpu_virt_init_data_exchange': drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c:331:20: error: dereferencing pointer to incomplete type 'struct module' Further, THIS_MODULE is NULL when the driver is built-in, so the code would likely cause a NULL pointer dereference. This adds an #ifdef check to avoid the compile-time error, plus a NULL pointer check before dereferencing THIS_MODULE. It might be better to find a way to avoid using the module version altogether. Fixes: 2dc8f81e4f82 ("drm/amdgpu: SR-IOV data exchange between PF&VF") Signed-off-by: Arnd Bergmann Signed-off-by: Alex Deucher Reviewed-by: Harry Wentland Reviewed-By: Xiangliang Yu

drm/amdgpu: busywait KIQ register accessing (v4)

2017-10-19T19:27:19Z

Register accessing is performed when IRQ is disabled. Never sleep in this function. Known issue: dead sleep in many use cases of index/data registers. v2: - wrap polling fence functions. - don't trigger IRQ for polling in case of wrongly fence signal. v3: - handle wrap round gracefully. - add comments for polling function v4: - don't return negative timeout confused with error code Signed-off-by: pding Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: SR-IOV data exchange between PF&VF

2017-10-19T19:26:59Z

SR-IOV need to exchange some data between PF&VF through shared VRAM PF will copy some necessary firmware and information to the shared VRAM. It also requires some information from VF. PF will send a key through mailbox2 to help guest calculate checksum so that it can verify whether the data is correct. So check the data on the specified offset of the shared VRAM, if the checksum is right, read values from it and write some VF information next to the data from PF. Signed-off-by: Horace Chen Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: separate bo_va structure

2017-08-17T19:46:07Z

Split that into vm_bo_base and bo_va to allow other uses as well. Signed-off-by: Christian König Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: cleanup static CSA handling

2017-08-17T19:46:05Z

Move the CSA bo_va from the VM to the fpriv structure. Signed-off-by: Christian König Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu:kiq reg access need timeout(v2)

2017-05-24T21:40:17Z

this is to prevent fence forever waiting if FLR occured during register accessing. v2: use define instead of hardcode for the timeout msec Signed-off-by: Monk Liu Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: Move kiq ring lock out of virt structure

2017-05-24T21:40:12Z

The usage of kiq should not depend on the virtualization. Signed-off-by: Shaoyun Liu Reviewed-by:Andres Rodriquez Signed-off-by: Alex Deucher

drm/amdgpu/virt: bypass cg and pg setting for SRIOV

2017-05-24T21:40:03Z

GPU hypervisor cover all settings of CG and PG, so guest doesn't need to do anything. Bypass it. Signed-off-by: Frank Min Signed-off-by: Xiangliang Yu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu/virt: add two functions for MM table

2017-04-28T21:32:58Z

Add two functions to allocate & free MM table memory. Signed-off-by: Xiangliang Yu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher