<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h, branch v4.14</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.14</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.14'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2017-08-17T19:46:05Z</updated>
<entry>
<title>drm/amdgpu: cleanup static CSA handling</title>
<updated>2017-08-17T19:46:05Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-07-31T13:32:40Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0f4b3c68626199cd5ce619e2a3105d44b81f2753'/>
<id>urn:sha1:0f4b3c68626199cd5ce619e2a3105d44b81f2753</id>
<content type='text'>
Move the CSA bo_va from the VM to the fpriv structure.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Support passing amdgpu critical error to host via GPU Mailbox.</title>
<updated>2017-07-14T15:05:52Z</updated>
<author>
<name>Gavin Wan</name>
<email>Gavin.Wan@amd.com</email>
</author>
<published>2017-06-23T17:55:15Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=890419409a3aba2ca7185a824e47d8ded8df11a2'/>
<id>urn:sha1:890419409a3aba2ca7185a824e47d8ded8df11a2</id>
<content type='text'>
This feature works for SRIOV enviroment. For non-SRIOV enviroment, the
trans_error function does nothing.

The error information includes error_code (16bit), error_flags(16bit)
and error_data(64bit). Since there are not many errors, we keep the
errors in an array and transfer all errors to Host before amdgpu
initialization function (amdgpu_device_init) exit.

Signed-off-by: Gavin Wan &lt;Gavin.Wan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu:use job* to replace voluntary</title>
<updated>2017-05-24T21:40:38Z</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2017-04-26T06:51:54Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7225f8736c66b7130d3a6294217ed86f26b59489'/>
<id>urn:sha1:7225f8736c66b7130d3a6294217ed86f26b59489</id>
<content type='text'>
that way we can know which job cause hang and
can do per sched reset/recovery instead of all
sched.

Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Move kiq ring lock out of virt structure</title>
<updated>2017-05-24T21:40:12Z</updated>
<author>
<name>Shaoyun Liu</name>
<email>Shaoyun.Liu@amd.com</email>
</author>
<published>2017-04-28T21:18:26Z</published>
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<id>urn:sha1:cdf6adb28f79e728389b2e1a5e524504ce710eb6</id>
<content type='text'>
The usage of kiq should not depend on the virtualization.

Signed-off-by: Shaoyun Liu &lt;Shaoyun.Liu@amd.com&gt;
Reviewed-by:Andres Rodriquez &lt;andresx7@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/virt: add two functions for MM table</title>
<updated>2017-04-28T21:32:58Z</updated>
<author>
<name>Xiangliang Yu</name>
<email>Xiangliang.Yu@amd.com</email>
</author>
<published>2017-04-21T07:40:25Z</published>
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<id>urn:sha1:904cd3891dd390b109c8146974b47fca78b97c98</id>
<content type='text'>
Add two functions to allocate &amp; free MM table memory.

Signed-off-by: Xiangliang Yu &lt;Xiangliang.Yu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/virt: add structure for MM table</title>
<updated>2017-03-30T03:55:10Z</updated>
<author>
<name>Xiangliang Yu</name>
<email>Xiangliang.Yu@amd.com</email>
</author>
<published>2017-02-28T09:24:52Z</published>
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<id>urn:sha1:ecb2b9c698e8be7a9dbe746d794b5d5e6314e990</id>
<content type='text'>
Add new structure for MM table for multi media scheduler of sriov.

Signed-off-by: Xiangliang Yu &lt;Xiangliang.Yu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Acked-by: Christian KÃ¶nig &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu:use work instead of delay-work</title>
<updated>2017-03-30T03:53:11Z</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2017-02-06T05:56:47Z</published>
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<id>urn:sha1:480da2626028fb789aaddfe197daac1ab4f1e822</id>
<content type='text'>
no need to use a delay work since we don't know how
much time hypervisor takes on FLR, so just polling
and waiting in a work.

Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Xiangliang Yu &lt;Xiangliang.Yu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu:add lock_reset for SRIOV</title>
<updated>2017-03-30T03:52:46Z</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2017-01-25T07:48:01Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=147b5983bb9b942af1f1d8d9e05d93f97cca312c'/>
<id>urn:sha1:147b5983bb9b942af1f1d8d9e05d93f97cca312c</id>
<content type='text'>
this lock is used for sriov_gpu_reset, only get this mutex
can run into sriov_gpu_reset.

we have couple source triggers gpu_reset for SRIOV:
1) submit timedout and trigger reset voluntarily
2) invalid instruction detected by ENGINE and trigger reset voluntarily
2) hypervisor found world switch hang and trigger flr and notify guest to
   do reset.

all need take care and we need a mutex to protect the consistency of
reset routine.

Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu:change kiq lock name</title>
<updated>2017-03-30T03:52:45Z</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2017-01-25T07:33:56Z</published>
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<id>urn:sha1:ed17c71b3a89d5ef4d8c8053a29a78fa709bb458</id>
<content type='text'>
Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu:implement SRIOV gpu_reset (v2)</title>
<updated>2017-03-30T03:52:45Z</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2017-01-23T06:22:08Z</published>
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<id>urn:sha1:a90ad3c2afe5bebdd5d00aaec87fec6823545c59</id>
<content type='text'>
implement SRIOV gpu_reset for future use.
it wil be called from:
1) job timeout
2) privl access or instruction error interrupt
3) hypervisor detect VF hang

v2: agd: rebase on upstream

Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
