<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c, branch v5.19</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.19</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.19'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2022-06-08T15:24:13Z</updated>
<entry>
<title>drm/amdgpu: always flush the TLB on gfx8</title>
<updated>2022-06-08T15:24:13Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2022-06-03T13:05:04Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=84205d00934394076552e2f597cf04a835df3364'/>
<id>urn:sha1:84205d00934394076552e2f597cf04a835df3364</id>
<content type='text'>
The TLB on GFX8 stores each block of 8 PTEs where any of the valid bits
are set.

Fixes: 5255e146c99a ("drm/amdgpu: rework TLB flushing")
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Tested-by: Michal Kubecek &lt;mkubecek@suse.cz&gt;
Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Update PDEs flush TLB if PTB/PDB moved</title>
<updated>2022-06-03T20:27:17Z</updated>
<author>
<name>Philip Yang</name>
<email>Philip.Yang@amd.com</email>
</author>
<published>2022-06-01T23:02:45Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4d1e5f12b7a0d2ade73003d2522a23b4559c7e02'/>
<id>urn:sha1:4d1e5f12b7a0d2ade73003d2522a23b4559c7e02</id>
<content type='text'>
Flush TLBs when existing PDEs are updated because a PTB or PDB moved,
but avoids unnecessary TLB flushes when new PDBs or PTBs are added to
the page table, which commonly happens when memory is mapped for the
first time.

Suggested-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Philip Yang &lt;Philip.Yang@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'amd-drm-next-5.19-2022-05-18' of https://gitlab.freedesktop.org/agd5f/linux into drm-next</title>
<updated>2022-05-19T04:09:54Z</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2022-05-19T04:09:46Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=00df0514ab13813655a6fbaba85425f8f4780be2'/>
<id>urn:sha1:00df0514ab13813655a6fbaba85425f8f4780be2</id>
<content type='text'>
amd-drm-next-5.19-2022-05-18:

amdgpu:
- Misc code cleanups
- Additional SMU 13.x enablement
- Smartshift fixes
- GFX11 fixes
- Support for SMU 13.0.4
- SMU mutex fix
- Suspend/resume fix

amdkfd:
- static checker fix
- Doorbell/MMIO resource handling fix

Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;
From: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20220518205621.5741-1-alexander.deucher@amd.com
</content>
</entry>
<entry>
<title>drm/amdgpu: vm flush needed after updating PDEs</title>
<updated>2022-05-10T21:53:13Z</updated>
<author>
<name>Philip Yang</name>
<email>Philip.Yang@amd.com</email>
</author>
<published>2022-05-10T14:29:54Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5be323562c6a699d38430bc068a3fd192be8ed0d'/>
<id>urn:sha1:5be323562c6a699d38430bc068a3fd192be8ed0d</id>
<content type='text'>
If page table PDEs is evicted and restored, after updating PDEs, need
increase vm-&gt;tlb_seq, then amdgpu_vm_flush will flush TLB before command
submission.

Signed-off-by: Philip Yang &lt;Philip.Yang@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: skip gds switch for mes queue</title>
<updated>2022-05-04T14:43:52Z</updated>
<author>
<name>Jack Xiao</name>
<email>Jack.Xiao@amd.com</email>
</author>
<published>2020-03-20T07:12:26Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a4a5f5cab6128953b87c01f359e9b0b4e82b7be4'/>
<id>urn:sha1:a4a5f5cab6128953b87c01f359e9b0b4e82b7be4</id>
<content type='text'>
For mes manages gds allocation, skip gds switch.

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'amd-drm-next-5.19-2022-04-15' of https://gitlab.freedesktop.org/agd5f/linux into drm-next</title>
<updated>2022-04-28T04:33:20Z</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2022-04-28T04:33:20Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=dbe946287e0825f0e9cd4cbeacfcde9d9b2dd168'/>
<id>urn:sha1:dbe946287e0825f0e9cd4cbeacfcde9d9b2dd168</id>
<content type='text'>
amd-drm-next-5.19-2022-04-15:

amdgpu:
- USB-C updates
- GPUVM updates
- TMZ fixes for RV
- DCN 3.1 pstate fixes
- Display z state fixes
- RAS fixes
- Misc code cleanups and spelling fixes
- More DC FP rework
- GPUVM TLB handling rework
- Power management sysfs code cleanup
- Add RAS support for VCN
- Backlight fix
- Add unique id support for more asics
- Misc display updates
- SR-IOV fixes
- Extend CG and PG flags to 64 bits
- Enable VCN clk sysfs nodes for navi12

amdkfd:
- Fix IO link cleanup during device removal
- RAS fixes
- Retry fault fixes
- Asynchronously free events
- SVM fixes

radeon:
- Drop some dead code
- Misc code cleanups

From: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20220415135144.5700-1-alexander.deucher@amd.com
Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Fix one use-after-free of VM</title>
<updated>2022-04-14T19:27:02Z</updated>
<author>
<name>xinhui pan</name>
<email>xinhui.pan@amd.com</email>
</author>
<published>2022-04-12T11:52:16Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7c703a7d3f2b50a6187267420a4d3d7e62fa3206'/>
<id>urn:sha1:7c703a7d3f2b50a6187267420a4d3d7e62fa3206</id>
<content type='text'>
VM might already be freed when amdgpu_vm_tlb_seq_cb() is called.
We see the calltrace below.

Fix it by keeping the last flush fence around and wait for it to signal

BUG kmalloc-4k (Not tainted): Poison overwritten

0xffff9c88630414e8-0xffff9c88630414e8 @offset=5352. First byte 0x6c
instead of 0x6b Allocated in amdgpu_driver_open_kms+0x9d/0x360 [amdgpu]
age=44 cpu=0 pid=2343
 __slab_alloc.isra.0+0x4f/0x90
 kmem_cache_alloc_trace+0x6b8/0x7a0
 amdgpu_driver_open_kms+0x9d/0x360 [amdgpu]
 drm_file_alloc+0x222/0x3e0 [drm]
 drm_open+0x11d/0x410 [drm]
Freed in amdgpu_driver_postclose_kms+0x3e9/0x550 [amdgpu] age=22 cpu=1
pid=2485
 kfree+0x4a2/0x580
 amdgpu_driver_postclose_kms+0x3e9/0x550 [amdgpu]
 drm_file_free+0x24e/0x3c0 [drm]
 drm_close_helper.isra.0+0x90/0xb0 [drm]
 drm_release+0x97/0x1a0 [drm]
 __fput+0xb6/0x280
 ____fput+0xe/0x10
 task_work_run+0x64/0xb0

Suggested-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: xinhui pan &lt;xinhui.pan@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>dma-buf: add DMA_RESV_USAGE_BOOKKEEP v3</title>
<updated>2022-04-07T10:53:54Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2021-11-09T10:08:18Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0cc848a75b742c3f9800e643cd2c03b9cfdc3d69'/>
<id>urn:sha1:0cc848a75b742c3f9800e643cd2c03b9cfdc3d69</id>
<content type='text'>
Add an usage for submissions independent of implicit sync but still
interesting for memory management.

v2: cleanup the kerneldoc a bit
v3: separate amdgpu changes from this

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20220407085946.744568-10-christian.koenig@amd.com
</content>
</entry>
<entry>
<title>dma-buf: add enum dma_resv_usage v4</title>
<updated>2022-04-07T10:53:53Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2021-11-09T10:08:18Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7bc80a5462c37eab58a9ea386064307c0f447fd1'/>
<id>urn:sha1:7bc80a5462c37eab58a9ea386064307c0f447fd1</id>
<content type='text'>
This change adds the dma_resv_usage enum and allows us to specify why a
dma_resv object is queried for its containing fences.

Additional to that a dma_resv_usage_rw() helper function is added to aid
retrieving the fences for a read or write userspace submission.

This is then deployed to the different query functions of the dma_resv
object and all of their users. When the write paratermer was previously
true we now use DMA_RESV_USAGE_WRITE and DMA_RESV_USAGE_READ otherwise.

v2: add KERNEL/OTHER in separate patch
v3: some kerneldoc suggestions by Daniel
v4: some more kerneldoc suggestions by Daniel, fix missing cases lost in
    the rebase pointed out by Bas.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20220407085946.744568-2-christian.koenig@amd.com
</content>
</entry>
<entry>
<title>dma-buf/drivers: make reserving a shared slot mandatory v4</title>
<updated>2022-04-06T15:38:25Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2021-11-16T14:20:45Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c8d4c18bfbc4ab467188dbe45cc8155759f49d9e'/>
<id>urn:sha1:c8d4c18bfbc4ab467188dbe45cc8155759f49d9e</id>
<content type='text'>
Audit all the users of dma_resv_add_excl_fence() and make sure they
reserve a shared slot also when only trying to add an exclusive fence.

This is the next step towards handling the exclusive fence like a
shared one.

v2: fix missed case in amdgpu
v3: and two more radeon, rename function
v4: add one more case to TTM, fix i915 after rebase

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20220406075132.3263-2-christian.koenig@amd.com
</content>
</entry>
</feed>
