<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c, branch v4.19</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.19</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.19'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2018-05-15T18:44:06Z</updated>
<entry>
<title>drm/amdgpu/sriov: Need to set in_gpu_reset flag to back after gpu reset</title>
<updated>2018-05-15T18:44:06Z</updated>
<author>
<name>Emily Deng</name>
<email>Emily.Deng@amd.com</email>
</author>
<published>2018-04-26T10:02:14Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6e9c2b88eb42bdda6ba1f1a39238c446782d443e'/>
<id>urn:sha1:6e9c2b88eb42bdda6ba1f1a39238c446782d443e</id>
<content type='text'>
After host os reset gpu reset, need to set flag in_gpu_reset to
zero.

Signed-off-by: Emily Deng &lt;Emily.Deng@amd.com&gt;
Reviewed-by: Monk Liu &lt;monk.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix spelling mistake: "asssert" -&gt; "assert"</title>
<updated>2018-03-22T19:43:43Z</updated>
<author>
<name>Colin Ian King</name>
<email>colin.king@canonical.com</email>
</author>
<published>2018-03-22T15:41:44Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=36b3f84a05d5f186316c316fd6923a4cd6fcd1f7'/>
<id>urn:sha1:36b3f84a05d5f186316c316fd6923a4cd6fcd1f7</id>
<content type='text'>
Trivial fix to spelling mistake in pr_err error message text

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Colin Ian King &lt;colin.king@canonical.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Move IH clientid defs to separate file</title>
<updated>2018-03-14T20:16:35Z</updated>
<author>
<name>Oak Zeng</name>
<email>Oak.Zeng@amd.com</email>
</author>
<published>2018-03-08T21:44:47Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3760f76cbebb455deaaa3e64ad5feb25222e65a9'/>
<id>urn:sha1:3760f76cbebb455deaaa3e64ad5feb25222e65a9</id>
<content type='text'>
This is preparation for sharing client ID definitions
between amdgpu and amdkfd

Signed-off-by: Oak Zeng &lt;Oak.Zeng@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: refactoring mailbox to fix TDR handshake bugs(v2)</title>
<updated>2018-03-14T19:38:27Z</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2018-01-15T05:44:30Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=48527e5296edc7b952fb2c1c40fd8c388cc935ed'/>
<id>urn:sha1:48527e5296edc7b952fb2c1c40fd8c388cc935ed</id>
<content type='text'>
this patch actually refactor mailbox implmentations, and
all below changes are needed together to fix all those mailbox
handshake issues exposured by heavey TDR test.

1)refactor all mailbox functions based on byte accessing for mb_control
reason is to avoid touching non-related bits when writing trn/rcv part of
mailbox_control, this way some incorrect INTR sent to hypervisor
side could be avoided, and it fixes couple handshake bug.

2)trans_msg function re-impled: put a invalid
logic before transmitting message to make sure the ACK bit is in
a clear status, otherwise there is chance that ACK asserted already
before transmitting message and lead to fake ACK polling.
(hypervisor side have some tricks to workaround ACK bit being corrupted
by VF FLR which hase an side effects that may make guest side ACK bit
asserted wrongly), and clear TRANS_MSG words after message transferred.

3)for mailbox_flr_work, it is also re-worked: it takes the mutex lock
first if invoked, to block gpu recover's participate too early while
hypervisor side is doing VF FLR. (hypervisor sends FLR_NOTIFY to guest
before doing VF FLR and sentds FLR_COMPLETE after VF FLR done, and
the FLR_NOTIFY will trigger interrupt to guest which lead to
mailbox_flr_work being invoked)

This can avoid the issue that mailbox trans msg being cleared by its VF FLR.

4)for mailbox_rcv_irq IRQ routine, it should only peek msg and schedule
mailbox_flr_work, instead of ACK to hypervisor itself, because FLR_NOTIFY
msg sent from hypervisor side doesn't need VF's ACK (this is because
VF's ACK would lead to hypervisor clear its trans_valid/msg, and this
would cause handshake bug if trans_valid/msg is cleared not due to
correct VF ACK but from a wrong VF ACK like this "FLR_NOTIFY" one)

This fixed handshake bug that sometimes GUEST always couldn't receive
"READY_TO_ACCESS_GPU" msg from hypervisor.

5)seperate polling time limite accordingly:
POLL ACK cost no more than 500ms
POLL MSG cost no more than 12000ms
POLL FLR finish cost no more than 500ms

6) we still need to set adev into in_gpu_reset mode after we received
FLR_NOTIFY from host side, this can prevent innocent app wrongly succesed
to open amdgpu dri device.

FLR_NOFITY is received due to an IDLE hang detected from hypervisor side
which indicating GPU is already die in this VF.

v2:
use MACRO as the offset of mailbox_control register
don't test if NOTIFY_CMPL event in rcv_msg since it won't
recieve that message anymore

Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Pixel Ding &lt;Pixel.Ding@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: rename amdgpu_gpu_recover</title>
<updated>2017-12-18T15:59:58Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-12-15T21:40:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5f152b5e69a5392181b0a84bd55fe17a417364ac'/>
<id>urn:sha1:5f152b5e69a5392181b0a84bd55fe17a417364ac</id>
<content type='text'>
add device to the name for consistency.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Simplify amdgpu_lockup_timeout usage.</title>
<updated>2017-12-15T22:15:00Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2017-12-13T19:36:53Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=8854695add1eaaeafae728850c905c4727e56f35'/>
<id>urn:sha1:8854695add1eaaeafae728850c905c4727e56f35</id>
<content type='text'>
With introduction of amdgpu_gpu_recovery we don't need any more
to rely on amdgpu_lockup_timeout == 0 for disabling GPU reset.

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add gpu_recovery parameter</title>
<updated>2017-12-15T22:14:50Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2017-12-12T19:09:30Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=dcebf026e6f69fb79e7f88d10681faf4f8a985ba'/>
<id>urn:sha1:dcebf026e6f69fb79e7f88d10681faf4f8a985ba</id>
<content type='text'>
Add new parameter to control GPU recovery procedure.

v2:
Add auto logic where reset is disabled for bare metal and enabled
for SR-IOV.
Allow forced reset from debugfs.

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/admgpu: Reduce the usage of soc15ip.h</title>
<updated>2017-12-08T16:35:19Z</updated>
<author>
<name>Shaoyun Liu</name>
<email>Shaoyun.Liu@amd.com</email>
</author>
<published>2017-11-29T19:04:58Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4fd09a19a6337b1a58d6de8777e2210cec55ae84'/>
<id>urn:sha1:4fd09a19a6337b1a58d6de8777e2210cec55ae84</id>
<content type='text'>
Remove the header where it's not used.

Acked-by: Christian Konig &lt;christian.koenig@amd.com&gt;
Signed-off-by: Shaoyun Liu &lt;Shaoyun.Liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/include:cleanup vega10 header files.</title>
<updated>2017-12-06T17:48:22Z</updated>
<author>
<name>Feifei Xu</name>
<email>Feifei.Xu@amd.com</email>
</author>
<published>2017-11-24T04:31:36Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=fb960bd28354805a7e2a6dbdf8d8d07a5160d0cd'/>
<id>urn:sha1:fb960bd28354805a7e2a6dbdf8d8d07a5160d0cd</id>
<content type='text'>
Remove asic_reg/vega10 folder.

Signed-off-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/include:cleanup vega10 nbio header files.</title>
<updated>2017-12-06T17:48:21Z</updated>
<author>
<name>Feifei Xu</name>
<email>Feifei.Xu@amd.com</email>
</author>
<published>2017-11-23T06:54:48Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f0a58aa3f2ca113ff1f435cd186a0d3895a1cafb'/>
<id>urn:sha1:f0a58aa3f2ca113ff1f435cd186a0d3895a1cafb</id>
<content type='text'>
Cleanup asic_reg/vega10/NBIO folder.

Signed-off-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
