linux/drivers/gpu/drm/amd/amdgpu/nv.c, branch v5.14

drm/amdgpu - Corrected the video codecs array name for yellow carp

2021-07-21T21:47:28Z

Signed-off-by: Veerabadhran Gopalakrishnan Reviewed-by: James Zhu Signed-off-by: Alex Deucher

drm/amdgpu: update yellow carp external rev_id handling

2021-07-21T18:37:33Z

0x1681 has a different external revision id. Signed-off-by: Aaron Liu Reviewed-by: Huang Rui Signed-off-by: Alex Deucher

amdgpu/nv.c - Optimize code for video codec support structure

2021-07-16T18:17:05Z

Optimized the code for codec info structure initialization Signed-off-by: Veerabadhran Gopalakrishnan Reviewed-by: James Zhu Signed-off-by: Alex Deucher

amdgpu/nv.c - Added video codec support for Yellow Carp

2021-07-16T18:16:57Z

Added the supported codecs in the video capabilities query. Signed-off-by: Veerabadhran Gopalakrishnan Reviewed-by: James Zhu Signed-off-by: Alex Deucher

drm/amdgpu: move apu flags initialization to the start of device init

2021-07-01T04:05:18Z

In some asics, we need to adjust the behavior according to the apu flags at very early stage. Signed-off-by: Huang Rui Reviewed-by: Aaron Liu Signed-off-by: Alex Deucher

amdgpu/nv.c - Added codec query for Beige Goby

2021-06-30T04:18:23Z

Added the Beige Goby capabilities in codec query. v2: fix build error and indent (James) Signed-off-by: Veerabadhran Gopalakrishnan Reviewed-by: James Zhu Reviewed-by: Leo Liu Signed-off-by: Alex Deucher

drm/amdgpu: fix the hang caused by PCIe link width switch

2021-06-30T04:18:14Z

SMU had set all the necessary fields for a link width switch but the width switch wasn't occurring because the link was idle in the L1 state. Setting LC_L1_RECONFIG_EN=0x1 will allow width switches to also be initiated while in L1 instead of waiting until the link is back in L0. Signed-off-by: Evan Quan Reviewed-by: Lijo Lazar Signed-off-by: Alex Deucher Cc: stable@vger.kernel.org

drm/amdgpu: fix NAK-G generation during PCI-e link width switch

2021-06-30T04:17:56Z

A lot of NAK-G being generated when link widht switching is happening. WA for this issue is to program the SPC to 4 symbols per clock during bootup when the native PCIE width is x4. Signed-off-by: Evan Quan Reviewed-by: Lijo Lazar Signed-off-by: Alex Deucher Cc: stable@vger.kernel.org

drm/amdgpu: Add DC support and display block for Yellow Carp

2021-06-04T20:39:19Z

To enable output on real display instead of virtual. Acked-by: Huang Rui Signed-off-by: Nicholas Kazlauskas Signed-off-by: Alex Deucher

drm/amdgpu: add video_codecs query support for yellow carp

2021-06-04T20:03:25Z

Add video_codecs query support for yellow carp. Acked-by: Huang Rui Signed-off-by: James Zhu Acked-by: Alex Deucher Signed-off-by: Alex Deucher