<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/nv.c, branch v5.6</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.6</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.6'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2020-01-22T21:55:27Z</updated>
<entry>
<title>drm/amdgpu:  remove unnecessary conversion to bool</title>
<updated>2020-01-22T21:55:27Z</updated>
<author>
<name>Nirmoy Das</name>
<email>nirmoy.das@amd.com</email>
</author>
<published>2020-01-20T12:54:30Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a9d4fe2fd6529c3129ec6883b8649ea5c7eee4d3'/>
<id>urn:sha1:a9d4fe2fd6529c3129ec6883b8649ea5c7eee4d3</id>
<content type='text'>
Better clean that up before some automation starts to complain about it

Signed-off-by: Nirmoy Das &lt;nirmoy.das@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/sriov: workaround on rev_id for Navi12 under sriov</title>
<updated>2020-01-14T15:18:09Z</updated>
<author>
<name>Tiecheng Zhou</name>
<email>Tiecheng.Zhou@amd.com</email>
</author>
<published>2020-01-08T05:44:29Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=df5e984c8bd414561c320d6cbbb66d53abf4c7e2'/>
<id>urn:sha1:df5e984c8bd414561c320d6cbbb66d53abf4c7e2</id>
<content type='text'>
guest vm gets 0xffffffff when reading RCC_DEV0_EPF0_STRAP0,
as a consequence, the rev_id and external_rev_id are wrong.

workaround it by hardcoding the rev_id to 0, which is the default value.

v2. add comment in the code

Signed-off-by: Tiecheng Zhou &lt;Tiecheng.Zhou@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: cover the powerplay implementation details V3</title>
<updated>2020-01-14T15:18:08Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2020-01-07T08:57:39Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=9530273ec90cc0614f6ac56d0c024e2f39886419'/>
<id>urn:sha1:9530273ec90cc0614f6ac56d0c024e2f39886419</id>
<content type='text'>
This can save users much troubles. As they do not
actually need to care whether swSMU or traditional
powerplay routine should be used.

V2: apply the fixes to vi.c and cik.c also
V3: squash in oops fix

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: split swSMU baco_reset into enter and exit</title>
<updated>2019-11-19T21:42:51Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2019-10-28T19:20:03Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=11520f27085bbab7dcb2b5998dec7e7abe3a5bd1'/>
<id>urn:sha1:11520f27085bbab7dcb2b5998dec7e7abe3a5bd1</id>
<content type='text'>
BACO - Bus Active, Chip Off

So we can use it for power savings rather than just reset.

Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add supports_baco callback for NV asics.</title>
<updated>2019-11-19T21:42:48Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2019-11-07T23:12:17Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ac7426169e7bcbbf270fec48301286e5ccae08bc'/>
<id>urn:sha1:ac7426169e7bcbbf270fec48301286e5ccae08bc</id>
<content type='text'>
BACO - Bus Active, Chip Off

Check the BACO capabilities from the powerplay table.

Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/nv: add asic func for fetching vbios from rom directly</title>
<updated>2019-11-19T15:12:51Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2019-11-13T19:27:54Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=29bc37b410964e3a0233a048b9a33db13a9e08b6'/>
<id>urn:sha1:29bc37b410964e3a0233a048b9a33db13a9e08b6</id>
<content type='text'>
Needed as a fallback if the vbios can't be fetched by other means.

Reviewed-by: Xiaojie Yuan &lt;xiaojie.yuan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: enable JPEG2.0 for Navi1x and Renoir</title>
<updated>2019-11-19T15:12:50Z</updated>
<author>
<name>Leo Liu</name>
<email>leo.liu@amd.com</email>
</author>
<published>2019-11-08T20:01:42Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5be45a26c9fbb019814c611932fee391d1cfb364'/>
<id>urn:sha1:5be45a26c9fbb019814c611932fee391d1cfb364</id>
<content type='text'>
By adding JPEG IP block to the family

Signed-off-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add PG and CG for JPEG2.0</title>
<updated>2019-11-19T15:12:50Z</updated>
<author>
<name>Leo Liu</name>
<email>leo.liu@amd.com</email>
</author>
<published>2019-11-11T20:09:25Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=099d66e43f049f8461fd330620e3a668098c7e03'/>
<id>urn:sha1:099d66e43f049f8461fd330620e3a668098c7e03</id>
<content type='text'>
And enable them for Navi1x and Renoir

Signed-off-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix sysfs interface pcie_replay_count error on navi asic</title>
<updated>2019-11-07T23:08:07Z</updated>
<author>
<name>Kevin Wang</name>
<email>kevin1.wang@amd.com</email>
</author>
<published>2019-11-05T10:53:30Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2af8153126e1cdd93891a9edef76fbbd497e90ab'/>
<id>urn:sha1:2af8153126e1cdd93891a9edef76fbbd497e90ab</id>
<content type='text'>
the asic callback function of get_pcie_replay_count is not implement on navi asic,
it will cause null pinter error when read this interface.

Signed-off-by: Kevin Wang &lt;kevin1.wang@amd.com&gt;
Reviewed-by: Kent Russell &lt;kent.russell@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/SRIOV: SRIOV VF doesn't support BACO</title>
<updated>2019-10-30T15:06:51Z</updated>
<author>
<name>Jiange Zhao</name>
<email>Jiange.Zhao@amd.com</email>
</author>
<published>2019-10-28T10:04:14Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b4def3744ba811f5abc53750c71c52d71a2032b1'/>
<id>urn:sha1:b4def3744ba811f5abc53750c71c52d71a2032b1</id>
<content type='text'>
SRIOV VF doesn't support BACO.

Only PF with BACO capability can do it.

Signed-off-by: Jiange Zhao &lt;Jiange.Zhao@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
