<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/nv.c, branch v5.8</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.8</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.8'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2020-05-21T22:00:01Z</updated>
<entry>
<title>drm/amdgpu: drop navi pcie bw callback</title>
<updated>2020-05-21T22:00:01Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2020-05-19T21:06:20Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d3a3763432c5577fb46d45861eba489b0e76412e'/>
<id>urn:sha1:d3a3763432c5577fb46d45861eba489b0e76412e</id>
<content type='text'>
It's not implemented yet so just drop it so the sysfs
pcie bw file returns an appropriate error instead of
garbage.

Reviewed-by: Yong Zhao &lt;Yong.Zhao@amd.com&gt;
Reviewed-By: Kent Russell &lt;kent.russell@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: for nv12 always need smu ip</title>
<updated>2020-04-24T15:42:11Z</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2020-04-22T04:09:16Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=79bebabb88cb8ef32fb55023f351e1a26ccb4e20'/>
<id>urn:sha1:79bebabb88cb8ef32fb55023f351e1a26ccb4e20</id>
<content type='text'>
because nv12 SRIOV support one vf mode

Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Acked-by: Yintian Tao &lt;yttao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix wrong vram lost counter increment V2</title>
<updated>2020-04-13T16:02:08Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2020-04-10T07:38:44Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=dadce777e0947b9b6839f06f360882e54ba2a154'/>
<id>urn:sha1:dadce777e0947b9b6839f06f360882e54ba2a154</id>
<content type='text'>
Vram lost counter is wrongly increased by two during baco reset.

V2: assumed vram lost for mode1 reset on all ASICs

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: equip new req_init_data handshake</title>
<updated>2020-04-01T18:44:43Z</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2020-03-04T15:51:51Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=122078de168b8380e9dde15a5c04a5412e710cb6'/>
<id>urn:sha1:122078de168b8380e9dde15a5c04a5412e710cb6</id>
<content type='text'>
by this new handshake host side can prepare vbios/ip-discovery
and pf&amp;vf exchange data upon recieving this request without
stopping world switch.

this way the world switch is less impacted by VF's exclusive mode
request

Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Emily Deng &lt;Emily.Deng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: cleanup all virtualization detection routine</title>
<updated>2020-04-01T18:44:42Z</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2020-03-04T06:02:55Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3aa0115d238c71423d0e212138678a8cf51d4361'/>
<id>urn:sha1:3aa0115d238c71423d0e212138678a8cf51d4361</id>
<content type='text'>
we need to move virt detection much earlier because:
1) HW team confirms us that RCC_IOV_FUNC_IDENTIFIER will always
be at DE5 (dw) mmio offset from vega10, this way there is no
need to implement detect_hw_virt() routine in each nbio/chip file.
for VI SRIOV chip (tonga &amp; fiji), the BIF_IOV_FUNC_IDENTIFIER is at
0x1503

2) we need to acknowledged we are SRIOV VF before we do IP discovery because
the IP discovery content will be updated by host everytime after it recieved
a new coming "REQ_GPU_INIT_DATA" request from guest (there will be patches
for this new handshake soon).

Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Emily Deng &lt;Emily.Deng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: disable jpeg block for SRIOV</title>
<updated>2020-03-06T19:34:49Z</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2020-03-05T13:10:03Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=fe4424918655cc8229bd21ecdf33523cd40b0fc6'/>
<id>urn:sha1:fe4424918655cc8229bd21ecdf33523cd40b0fc6</id>
<content type='text'>
MMSCH doesn't support jpeg ring on SRIOV

Signed-off-by: Jinage Zhao &lt;jiange.zhao@amd.com&gt;
Singed-off-by: darlington Opara &lt;darlington.opara@amd.com&gt;
Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Leo Liu &lt;leo.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu:  remove unnecessary conversion to bool</title>
<updated>2020-01-22T21:55:27Z</updated>
<author>
<name>Nirmoy Das</name>
<email>nirmoy.das@amd.com</email>
</author>
<published>2020-01-20T12:54:30Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a9d4fe2fd6529c3129ec6883b8649ea5c7eee4d3'/>
<id>urn:sha1:a9d4fe2fd6529c3129ec6883b8649ea5c7eee4d3</id>
<content type='text'>
Better clean that up before some automation starts to complain about it

Signed-off-by: Nirmoy Das &lt;nirmoy.das@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/sriov: workaround on rev_id for Navi12 under sriov</title>
<updated>2020-01-14T15:18:09Z</updated>
<author>
<name>Tiecheng Zhou</name>
<email>Tiecheng.Zhou@amd.com</email>
</author>
<published>2020-01-08T05:44:29Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=df5e984c8bd414561c320d6cbbb66d53abf4c7e2'/>
<id>urn:sha1:df5e984c8bd414561c320d6cbbb66d53abf4c7e2</id>
<content type='text'>
guest vm gets 0xffffffff when reading RCC_DEV0_EPF0_STRAP0,
as a consequence, the rev_id and external_rev_id are wrong.

workaround it by hardcoding the rev_id to 0, which is the default value.

v2. add comment in the code

Signed-off-by: Tiecheng Zhou &lt;Tiecheng.Zhou@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: cover the powerplay implementation details V3</title>
<updated>2020-01-14T15:18:08Z</updated>
<author>
<name>Evan Quan</name>
<email>evan.quan@amd.com</email>
</author>
<published>2020-01-07T08:57:39Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=9530273ec90cc0614f6ac56d0c024e2f39886419'/>
<id>urn:sha1:9530273ec90cc0614f6ac56d0c024e2f39886419</id>
<content type='text'>
This can save users much troubles. As they do not
actually need to care whether swSMU or traditional
powerplay routine should be used.

V2: apply the fixes to vi.c and cik.c also
V3: squash in oops fix

Signed-off-by: Evan Quan &lt;evan.quan@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: split swSMU baco_reset into enter and exit</title>
<updated>2019-11-19T21:42:51Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2019-10-28T19:20:03Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=11520f27085bbab7dcb2b5998dec7e7abe3a5bd1'/>
<id>urn:sha1:11520f27085bbab7dcb2b5998dec7e7abe3a5bd1</id>
<content type='text'>
BACO - Bus Active, Chip Off

So we can use it for power savings rather than just reset.

Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
