<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/nv.c, branch v6.7</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v6.7</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v6.7'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2023-10-26T22:41:23Z</updated>
<entry>
<title>drm/amd: Explicitly disable ASPM when dynamic switching disabled</title>
<updated>2023-10-26T22:41:23Z</updated>
<author>
<name>Mario Limonciello</name>
<email>mario.limonciello@amd.com</email>
</author>
<published>2023-10-23T20:50:05Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2757a848cb0f184850d3e0a33b4a69e8014fdc5d'/>
<id>urn:sha1:2757a848cb0f184850d3e0a33b4a69e8014fdc5d</id>
<content type='text'>
Currently there are separate but related checks:
* amdgpu_device_should_use_aspm()
* amdgpu_device_aspm_support_quirk()
* amdgpu_device_pcie_dynamic_switching_supported()

Simplify into checking whether DPM was enabled or not in the auto
case.  This works because amdgpu_device_pcie_dynamic_switching_supported()
populates that value.

Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd: Move AMD_IS_APU check for ASPM into top level function</title>
<updated>2023-10-26T22:41:23Z</updated>
<author>
<name>Mario Limonciello</name>
<email>mario.limonciello@amd.com</email>
</author>
<published>2023-10-23T20:47:43Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1a6513de493d13f8d7501611fcc5bbaea4c799b3'/>
<id>urn:sha1:1a6513de493d13f8d7501611fcc5bbaea4c799b3</id>
<content type='text'>
There is no need for every ASIC driver to perform the same check.
Move the duplicated code into amdgpu_device_should_use_aspm().

Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Drop unnecessary return statements</title>
<updated>2023-10-05T21:59:35Z</updated>
<author>
<name>Srinivasan Shanmugam</name>
<email>srinivasan.shanmugam@amd.com</email>
</author>
<published>2023-09-30T02:41:31Z</published>
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<id>urn:sha1:e0a3e7bf62dfbf6a1730f244b2adf53fac07003b</id>
<content type='text'>
There is no reason to call return at the end of function that
returns void.

Fixes the below:

WARNING: void function return statements are not generally useful

Thus remove such a statement in the affected functions.

Cc: Christian König &lt;christian.koenig@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: "Pan, Xinhui" &lt;Xinhui.Pan@amd.com&gt;
Signed-off-by: Srinivasan Shanmugam &lt;srinivasan.shanmugam@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Use function for IP version check</title>
<updated>2023-09-20T16:23:28Z</updated>
<author>
<name>Lijo Lazar</name>
<email>lijo.lazar@amd.com</email>
</author>
<published>2023-09-11T08:18:11Z</published>
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<id>urn:sha1:4e8303cf2c4dd27374a16a8881ec1a1cd5baf86f</id>
<content type='text'>
Use an inline function for version check. Gives more flexibility to
handle any format changes.

Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Clean up errors in nv.c</title>
<updated>2023-08-09T13:43:49Z</updated>
<author>
<name>Ran Sun</name>
<email>sunran001@208suo.com</email>
</author>
<published>2023-08-02T07:34:39Z</published>
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<id>urn:sha1:939a392f07e2d553feec97d7345a054586169d0a</id>
<content type='text'>
Fix the following errors reported by checkpatch:

ERROR: that open brace { should be on the previous line

Signed-off-by: Ran Sun &lt;sunran001@208suo.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Use nbio callback for nv and soc21</title>
<updated>2023-08-07T21:14:06Z</updated>
<author>
<name>Lijo Lazar</name>
<email>lijo.lazar@amd.com</email>
</author>
<published>2023-07-27T09:22:42Z</published>
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<id>urn:sha1:36f3f375ed156d177a1adbafc3247a43880a9710</id>
<content type='text'>
Make the new ascis to follow nbio callback method to get pcie replay
count.

Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: enable SDMA MGCG for SDMA 5.2.x</title>
<updated>2023-08-07T21:12:49Z</updated>
<author>
<name>Prike Liang</name>
<email>Prike.Liang@amd.com</email>
</author>
<published>2023-07-25T09:11:16Z</published>
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<id>urn:sha1:f05f4fe6aba0af71670b6b4fcae025485ac222c3</id>
<content type='text'>
Now the SDMA firmware can support SDMA MGCG properly,
so let's enable it from the driver side.

Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: retire set_vga_state for some ASIC</title>
<updated>2023-06-09T14:41:50Z</updated>
<author>
<name>Likun Gao</name>
<email>Likun.Gao@amd.com</email>
</author>
<published>2023-05-19T10:54:18Z</published>
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<id>urn:sha1:20a29ac09192f9d9705015261652f277e8162f09</id>
<content type='text'>
set_vga_state operation only allowed on SI generation
ASIC, retire the realted function on those ASIC which
did not do anything.

Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/nv: update VCN 3 max HEVC encoding resolution</title>
<updated>2023-06-09T13:29:39Z</updated>
<author>
<name>Thong Thai</name>
<email>thong.thai@amd.com</email>
</author>
<published>2023-05-01T15:04:36Z</published>
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<id>urn:sha1:c6fa6fe9ebd5cdde0e41a558ff3efea8fe988e77</id>
<content type='text'>
Update the maximum resolution reported for HEVC encoding on VCN 3
devices to reflect its 8K encoding capability.

v2: Also update the max height for H.264 encoding to match spec.
(Ruijing)

Signed-off-by: Thong Thai &lt;thong.thai@amd.com&gt;
Reviewed-by: Ruijing Dong &lt;ruijing.dong@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Enable doorbell selfring after resize FB BAR</title>
<updated>2023-06-09T13:22:55Z</updated>
<author>
<name>Shane Xiao</name>
<email>shane.xiao@amd.com</email>
</author>
<published>2023-04-25T14:39:08Z</published>
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<id>urn:sha1:1c312e816c4088d183c41b5d944f89775f3789bd</id>
<content type='text'>
[Why]
The selfring doorbell aperture will change when resize FB
BAR successfully during gmc sw init, we should reorder
the sequence of enabling doorbell selfring aperture.

[How]
Move enable_doorbell_selfring_aperture from *_common_hw_init
to *_common_late_init.

This fixes the potential issue that GPU ring its own
doorbell when this device is in translated mode when
iommu is on.

v2: Remove *_enable_doorbell_aperture functions (Christian)
v3: Add comments to note that why we need enable doorbell
    selfring late (Christian)

Signed-off-by: Shane Xiao &lt;shane.xiao@amd.com&gt;
Signed-off-by: Aaron Liu &lt;aaron.liu@amd.com&gt;
Tested-by: Xiaomeng Hou &lt;Xiaomeng.Hou@amd.com&gt;
Reviewed-by: Christian K�nig &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
