<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu, branch v6.15</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v6.15</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v6.15'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2025-05-14T15:51:31Z</updated>
<entry>
<title>drm/amdgpu: read back register after written for VCN v4.0.5</title>
<updated>2025-05-14T15:51:31Z</updated>
<author>
<name>David (Ming Qiang) Wu</name>
<email>David.Wu3@amd.com</email>
</author>
<published>2025-05-12T19:14:43Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ee7360fc27d6045510f8fe459b5649b2af27811a'/>
<id>urn:sha1:ee7360fc27d6045510f8fe459b5649b2af27811a</id>
<content type='text'>
On VCN v4.0.5 there is a race condition where the WPTR is not
updated after starting from idle when doorbell is used. Adding
register read-back after written at function end is to ensure
all register writes are done before they can be used.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12528
Signed-off-by: David (Ming Qiang) Wu &lt;David.Wu3@amd.com&gt;
Reviewed-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Tested-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Ruijing Dong &lt;ruijing.dong@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 07c9db090b86e5211188e1b351303fbc673378cf)
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu: fix incorrect MALL size for GFX1151</title>
<updated>2025-05-13T18:16:43Z</updated>
<author>
<name>Tim Huang</name>
<email>tim.huang@amd.com</email>
</author>
<published>2025-05-08T05:37:35Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2d73b0845ab3963856e857b810600e5594bc29f4'/>
<id>urn:sha1:2d73b0845ab3963856e857b810600e5594bc29f4</id>
<content type='text'>
On GFX1151, the reported MALL cache size reflects only
half of its actual size; this adjustment corrects the discrepancy.

Signed-off-by: Tim Huang &lt;tim.huang@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Yifan Zhang &lt;yifan1.zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 0a5c060b593ad152318f89e5564bfdfcff8a6ac0)
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu: csa unmap use uninterruptible lock</title>
<updated>2025-05-13T18:16:30Z</updated>
<author>
<name>Philip Yang</name>
<email>Philip.Yang@amd.com</email>
</author>
<published>2025-05-07T15:04:32Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a0fa7873f2f869087b1e7793f7fac3713a1e3afe'/>
<id>urn:sha1:a0fa7873f2f869087b1e7793f7fac3713a1e3afe</id>
<content type='text'>
After process exit to unmap csa and free GPU vm, if signal is accepted
and then waiting to take vm lock is interrupted and return, it causes
memory leaking and below warning backtrace.

Change to use uninterruptible wait lock fix the issue.

WARNING: CPU: 69 PID: 167800 at amd/amdgpu/amdgpu_kms.c:1525
 amdgpu_driver_postclose_kms+0x294/0x2a0 [amdgpu]
 Call Trace:
  &lt;TASK&gt;
  drm_file_free.part.0+0x1da/0x230 [drm]
  drm_close_helper.isra.0+0x65/0x70 [drm]
  drm_release+0x6a/0x120 [drm]
  amdgpu_drm_release+0x51/0x60 [amdgpu]
  __fput+0x9f/0x280
  ____fput+0xe/0x20
  task_work_run+0x67/0xa0
  do_exit+0x217/0x3c0
  do_group_exit+0x3b/0xb0
  get_signal+0x14a/0x8d0
  arch_do_signal_or_restart+0xde/0x100
  exit_to_user_mode_loop+0xc1/0x1a0
  exit_to_user_mode_prepare+0xf4/0x100
  syscall_exit_to_user_mode+0x17/0x40
  do_syscall_64+0x69/0xc0

Signed-off-by: Philip Yang &lt;Philip.Yang@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 7dbbfb3c171a6f63b01165958629c9c26abf38ab)
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu/hdp7: use memcfg register to post the write for HDP flush</title>
<updated>2025-05-08T15:48:12Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2025-04-30T16:50:02Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5a11a2767731139bf87e667331aa2209e33a1d19'/>
<id>urn:sha1:5a11a2767731139bf87e667331aa2209e33a1d19</id>
<content type='text'>
Reading back the remapped HDP flush register seems to cause
problems on some platforms. All we need is a read, so read back
the memcfg register.

Fixes: 689275140cb8 ("drm/amdgpu/hdp7.0: do a posting read when flushing HDP")
Reported-by: Alexey Klimov &lt;alexey.klimov@linaro.org&gt;
Link: https://lists.freedesktop.org/archives/amd-gfx/2025-April/123150.html
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4119
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3908
Reviewed-by: Felix Kuehling &lt;felix.kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit dbc064adfcf9095e7d895bea87b2f75c1ab23236)
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu/hdp6: use memcfg register to post the write for HDP flush</title>
<updated>2025-05-08T15:47:54Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2025-04-30T16:48:51Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ca28e80abe4219c8f1a2961ae05102d70af6dc87'/>
<id>urn:sha1:ca28e80abe4219c8f1a2961ae05102d70af6dc87</id>
<content type='text'>
Reading back the remapped HDP flush register seems to cause
problems on some platforms. All we need is a read, so read back
the memcfg register.

Fixes: abe1cbaec6cf ("drm/amdgpu/hdp6.0: do a posting read when flushing HDP")
Reported-by: Alexey Klimov &lt;alexey.klimov@linaro.org&gt;
Link: https://lists.freedesktop.org/archives/amd-gfx/2025-April/123150.html
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4119
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3908
Reviewed-by: Felix Kuehling &lt;felix.kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 84141ff615951359c9a99696fd79a36c465ed847)
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu/hdp5.2: use memcfg register to post the write for HDP flush</title>
<updated>2025-05-08T15:47:23Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2025-04-30T16:47:37Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=dbc988c689333faeeed44d5561f372ff20395304'/>
<id>urn:sha1:dbc988c689333faeeed44d5561f372ff20395304</id>
<content type='text'>
Reading back the remapped HDP flush register seems to cause
problems on some platforms. All we need is a read, so read back
the memcfg register.

Fixes: f756dbac1ce1 ("drm/amdgpu/hdp5.2: do a posting read when flushing HDP")
Reported-by: Alexey Klimov &lt;alexey.klimov@linaro.org&gt;
Link: https://lists.freedesktop.org/archives/amd-gfx/2025-April/123150.html
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4119
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3908
Reviewed-by: Felix Kuehling &lt;felix.kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 4a89b7698e771914b4d5b571600c76e2fdcbe2a9)
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu/hdp5: use memcfg register to post the write for HDP flush</title>
<updated>2025-05-08T15:46:57Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2025-04-30T16:46:56Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0e33e0f339b91eecd9558311449a3d1e728722d4'/>
<id>urn:sha1:0e33e0f339b91eecd9558311449a3d1e728722d4</id>
<content type='text'>
Reading back the remapped HDP flush register seems to cause
problems on some platforms. All we need is a read, so read back
the memcfg register.

Fixes: cf424020e040 ("drm/amdgpu/hdp5.0: do a posting read when flushing HDP")
Reported-by: Alexey Klimov &lt;alexey.klimov@linaro.org&gt;
Link: https://lists.freedesktop.org/archives/amd-gfx/2025-April/123150.html
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4119
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3908
Reviewed-by: Felix Kuehling &lt;felix.kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit a5cb344033c7598762e89255e8ff52827abb57a4)
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu/hdp4: use memcfg register to post the write for HDP flush</title>
<updated>2025-05-07T22:24:56Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2025-04-30T16:45:04Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f690e3974755a650259a45d71456decc9c96a282'/>
<id>urn:sha1:f690e3974755a650259a45d71456decc9c96a282</id>
<content type='text'>
Reading back the remapped HDP flush register seems to cause
problems on some platforms. All we need is a read, so read back
the memcfg register.

Fixes: c9b8dcabb52a ("drm/amdgpu/hdp4.0: do a posting read when flushing HDP")
Reported-by: Alexey Klimov &lt;alexey.klimov@linaro.org&gt;
Link: https://lists.freedesktop.org/archives/amd-gfx/2025-April/123150.html
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4119
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3908
Reviewed-by: Felix Kuehling &lt;felix.kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 5c937b4a6050316af37ef214825b6340b5e9e391)
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu: fix pm notifier handling</title>
<updated>2025-05-07T22:24:30Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2025-05-01T17:46:46Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4aaffc85751da5722e858e4333e8cf0aa4b6c78f'/>
<id>urn:sha1:4aaffc85751da5722e858e4333e8cf0aa4b6c78f</id>
<content type='text'>
Set the s3/s0ix and s4 flags in the pm notifier so that we can skip
the resource evictions properly in pm prepare based on whether
we are suspending or hibernating.  Drop the eviction as processes
are not frozen at this time, we we can end up getting stuck trying
to evict VRAM while applications continue to submit work which
causes the buffers to get pulled back into VRAM.

v2: Move suspend flags out of pm notifier (Mario)

Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4178
Fixes: 2965e6355dcd ("drm/amd: Add Suspend/Hibernate notification callback support")
Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Reviewed-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit 06f2dcc241e7e5c681f81fbc46cacdf4bfd7d6d7)
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>Revert "drm/amd: Stop evicting resources on APUs in suspend"</title>
<updated>2025-05-07T22:24:04Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2025-05-01T17:00:16Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d0ce1aaa8531a4a4707711cab5721374751c51b0'/>
<id>urn:sha1:d0ce1aaa8531a4a4707711cab5721374751c51b0</id>
<content type='text'>
This reverts commit 3a9626c816db901def438dc2513622e281186d39.

This breaks S4 because we end up setting the s3/s0ix flags
even when we are entering s4 since prepare is used by both
flows.  The causes both the S3/s0ix and s4 flags to be set
which breaks several checks in the driver which assume they
are mutually exclusive.

Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3634
Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Reviewed-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
(cherry picked from commit ce8f7d95899c2869b47ea6ce0b3e5bf304b2fff4)
Cc: stable@vger.kernel.org
</content>
</entry>
</feed>
