<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c, branch v5.6</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.6</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.6'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2020-01-07T16:55:04Z</updated>
<entry>
<title>drm/amdkfd: Avoid hanging hardware in stop_cpsch</title>
<updated>2020-01-07T16:55:04Z</updated>
<author>
<name>Felix Kuehling</name>
<email>Felix.Kuehling@amd.com</email>
</author>
<published>2019-12-20T07:46:55Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c2a77fde10ec2cac33a23c8ac53d181bc2fe0cee'/>
<id>urn:sha1:c2a77fde10ec2cac33a23c8ac53d181bc2fe0cee</id>
<content type='text'>
Don't use the HWS if it's known to be hanging. In a reset also
don't try to destroy the HIQ because that may hang on SRIOV if the
KIQ is unresponsive.

Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Tested-by: Emily Deng &lt;Emily.Deng@amd.com&gt;
Reviewed-by: shaoyunl  &lt;shaoyun.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Rename create_cp_queue() to init_user_queue()</title>
<updated>2019-11-13T20:29:45Z</updated>
<author>
<name>Yong Zhao</name>
<email>Yong.Zhao@amd.com</email>
</author>
<published>2019-01-16T00:23:16Z</published>
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<id>urn:sha1:2d030d3e97a6da66d9c6fa558e01571ec14a92b0</id>
<content type='text'>
create_cp_queue() could also work with SDMA queues, so we should rename
it. It only initialize the data values rather than creating queues.

Signed-off-by: Yong Zhao &lt;Yong.Zhao@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Avoid using doorbell_off as offset in process doorbell pages</title>
<updated>2019-11-13T20:29:45Z</updated>
<author>
<name>Yong Zhao</name>
<email>Yong.Zhao@amd.com</email>
</author>
<published>2019-01-15T18:58:57Z</published>
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<id>urn:sha1:e47a8b5223033e4dea5e68a228783e3c5ae0b623</id>
<content type='text'>
dorbell_off in the queue properties is mainly used for the doorbell dw
offset in pci bar. We should not set it to the doorbell byte offset in
process doorbell pages. This makes the code much easier to read.

Signed-off-by: Yong Zhao &lt;Yong.Zhao@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Use hex print format for pasid</title>
<updated>2019-10-03T14:11:03Z</updated>
<author>
<name>Yong Zhao</name>
<email>Yong.Zhao@amd.com</email>
</author>
<published>2019-09-25T21:00:59Z</published>
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<id>urn:sha1:6027b1bf6071fc61a5aa11b9922a2e0e91bff1ea</id>
<content type='text'>
Since KFD pasid starts from 0x8000 (32768 in decimal), it is better
perceived as a hex number. Meanwhile, change the pasid type from
unsigned int to uint16_t to be consistent throughout the code.

Signed-off-by: Yong Zhao &lt;Yong.Zhao@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Remove GWS from process during uninit</title>
<updated>2019-07-17T18:34:31Z</updated>
<author>
<name>Joseph Greathouse</name>
<email>Joseph.Greathouse@amd.com</email>
</author>
<published>2019-07-17T14:47:58Z</published>
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<id>urn:sha1:6a5d4877544b9014c70533200ad4a5f9d6e005c5</id>
<content type='text'>
If we shut down a process without having destroyed its GWS-using
queues, it is possible that GWS BO will still be in the process
BO list during the gpuvm destruction. This list should be empty
at that time, so we should remove the GWS allocation at the
process uninit point if it is still around.

Signed-off-by: Joseph Greathouse &lt;Joseph.Greathouse@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Return proper error code for gws alloc API</title>
<updated>2019-05-31T15:39:33Z</updated>
<author>
<name>Oak Zeng</name>
<email>Oak.Zeng@amd.com</email>
</author>
<published>2019-05-28T19:51:49Z</published>
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<id>urn:sha1:443e902eeef96f3bed54a7067c50a07f06074373</id>
<content type='text'>
Signed-off-by: Oak Zeng &lt;Oak.Zeng@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Add function to set queue gws</title>
<updated>2019-05-28T19:44:24Z</updated>
<author>
<name>Oak Zeng</name>
<email>Oak.Zeng@amd.com</email>
</author>
<published>2019-05-07T02:31:52Z</published>
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<id>urn:sha1:eb82da1dc4429c026a165f419f8c76d7bbdcf26f</id>
<content type='text'>
Add functions in process queue manager to
set/unset queue gws. Also set process's number
of gws used. Currently only one queue in
process can use and use all gws.

Signed-off-by: Oak Zeng &lt;Oak.Zeng@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Introduce XGMI SDMA queue type</title>
<updated>2019-05-24T17:21:02Z</updated>
<author>
<name>Oak Zeng</name>
<email>Oak.Zeng@amd.com</email>
</author>
<published>2019-02-07T20:02:27Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1b4670f6983156526c286723465fdf805070b45d'/>
<id>urn:sha1:1b4670f6983156526c286723465fdf805070b45d</id>
<content type='text'>
Existing QUEUE_TYPE_SDMA means PCIe optimized SDMA queues.
Introduce a new QUEUE_TYPE_SDMA_XGMI, which is optimized
for non-PCIe transfer such as XGMI.

Signed-off-by: Oak Zeng &lt;Oak.Zeng@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Init mqd managers in device queue manager init</title>
<updated>2019-05-24T17:21:02Z</updated>
<author>
<name>Oak Zeng</name>
<email>ozeng@amd.com</email>
</author>
<published>2018-12-05T16:15:27Z</published>
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<id>urn:sha1:fdfa090bc90f34543b8efd05b05a143ae6d52406</id>
<content type='text'>
Previously mqd managers was initialized on demand. As there
are only a few type of mqd managers, the on demand initialization
doesn't save too much memory. Initialize them on device
queue initialization instead and delete the get_mqd_manager
interface. This makes codes more organized for future changes.

Signed-off-by: Oak Zeng &lt;ozeng@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Introduce DIQ type mqd manager</title>
<updated>2019-05-24T17:21:02Z</updated>
<author>
<name>Oak Zeng</name>
<email>ozeng@amd.com</email>
</author>
<published>2018-12-04T02:38:43Z</published>
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<id>urn:sha1:59f650a06f8f530e2412e5c47106cd8b8895bd89</id>
<content type='text'>
With introduction of new mqd allocation scheme for HIQ,
DIQ and HIQ use different mqd allocation scheme, DIQ
can't reuse HIQ mqd manager

Signed-off-by: Oak Zeng &lt;ozeng@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
