<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c, branch v5.0</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.0</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.0'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2018-07-30T00:39:22Z</updated>
<entry>
<title>BackMerge v4.18-rc7 into drm-next</title>
<updated>2018-07-30T00:39:22Z</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2018-07-30T00:39:22Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3fce4618279373efc59a91adb16c11da46cd69e5'/>
<id>urn:sha1:3fce4618279373efc59a91adb16c11da46cd69e5</id>
<content type='text'>
rmk requested this for armada and I think we've had a few
conflicts build up.

Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Convert 10kHz clks from PPLib into kHz for Vega</title>
<updated>2018-07-12T14:48:57Z</updated>
<author>
<name>Harry Wentland</name>
<email>harry.wentland@amd.com</email>
</author>
<published>2018-07-12T14:23:21Z</published>
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<id>urn:sha1:d89d01f2232b90e8024ae07ff5ab213521875448</id>
<content type='text'>
The driver is expecting clock frequency in kHz, while SMU returns
the values in 10kHz, which causes the bandwidth validation to fail

4.18 has the faulty clock assignment in pp_to_dc_clock_levels_with_latency
only, which is only used by Vega. Make sure we multiply these values
by 10 here, as we do for other ASICs as powerplay assigned them
wrong. 4.19 has the proper fix in powerplay.

v2: Add Fixes tag
v3: Fixes -&gt; Bugzilla, with simplified link

Bugzilla: https://bugs.freedesktop.org/107082

Signed-off-by: Mikita Lipski &lt;mikita.lipski@amd.com&gt;
Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Acked-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Moving powerplay functions to a separate class</title>
<updated>2018-07-05T21:38:41Z</updated>
<author>
<name>Mikita Lipski</name>
<email>mikita.lipski@amd.com</email>
</author>
<published>2018-06-01T19:02:55Z</published>
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<id>urn:sha1:f7c1ed341ae0807e55fc583fbd5582ff4ef35a98</id>
<content type='text'>
Moving powerplay functions to a new amdgpu_dm_pp_smu class
and cleaning dm_services class from unused headers.

Signed-off-by: Mikita Lipski &lt;mikita.lipski@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Convert 10kHz clks from PPLib into kHz</title>
<updated>2018-07-05T21:38:40Z</updated>
<author>
<name>Mikita Lipski</name>
<email>mikita.lipski@amd.com</email>
</author>
<published>2018-05-31T18:44:18Z</published>
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<id>urn:sha1:724a75524b1c77ea8abb96c21cdba05385b22b39</id>
<content type='text'>
The driver is expecting clock frequency in kHz, while SMU returns
the values in 10kHz, which causes the bandwidth validation to fail

Signed-off-by: Mikita Lipski &lt;mikita.lipski@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add dmpp clks types for conversion</title>
<updated>2018-07-05T21:38:40Z</updated>
<author>
<name>Mikita Lipski</name>
<email>mikita.lipski@amd.com</email>
</author>
<published>2018-05-31T21:31:14Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=015ec75918698e63f770c9bee0752ce802ed55e2'/>
<id>urn:sha1:015ec75918698e63f770c9bee0752ce802ed55e2</id>
<content type='text'>
Add more cases for dm_pp clks translator into pp clks so
we can pass the right structures to the powerplay.
Use clks translator instead of massive switch statement.

Signed-off-by: Mikita Lipski &lt;mikita.lipski@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add clock types to applying clk for voltage</title>
<updated>2018-07-05T21:38:32Z</updated>
<author>
<name>Mikita Lipski</name>
<email>mikita.lipski@amd.com</email>
</author>
<published>2018-05-29T20:20:37Z</published>
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<id>urn:sha1:25684c59aff5147d48cc7ce04d4d75a15c5a3a71</id>
<content type='text'>
Add DCF and FCLK clock case statements for changing raven's
clocks for voltage request.
Also maintain DCEF clock for DCE120 calls.

Signed-off-by: Mikita Lipski &lt;mikita.lipski@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Use local structs instead of struct pointers</title>
<updated>2018-07-05T21:38:31Z</updated>
<author>
<name>Mikita Lipski</name>
<email>mikita.lipski@amd.com</email>
</author>
<published>2018-05-29T20:15:12Z</published>
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<id>urn:sha1:9654a28b3ac075f2454d5867d490b0c2f7cde9fd</id>
<content type='text'>
Change struct pointers to creating structs on a stack.
Thats fixing a mistake in a previous patch introducing dm_pplib functions

Signed-off-by: Mikita Lipski &lt;mikita.lipski@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Introduce pp-smu raven functions</title>
<updated>2018-07-05T21:38:30Z</updated>
<author>
<name>Mikita Lipski</name>
<email>mikita.lipski@amd.com</email>
</author>
<published>2018-04-11T18:52:41Z</published>
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<id>urn:sha1:92276a06f9c3d29183c7bdf46a6dbbc9c00f7acf</id>
<content type='text'>
DM powerplay calls for DCN10 allowing to bypass PPLib
and call directly to the SMU functions.

Signed-off-by: Mikita Lipski &lt;mikita.lipski@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Adding Get static clocks for dm_pp interface</title>
<updated>2018-07-05T21:38:29Z</updated>
<author>
<name>Mikita Lipski</name>
<email>mikita.lipski@amd.com</email>
</author>
<published>2018-04-18T21:19:23Z</published>
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<id>urn:sha1:db4e525304ddf272e45542cbfd820840cf6ac874</id>
<content type='text'>
Adding a call to powerplay to get system clocks and translate to dm structure

Signed-off-by: Mikita Lipski &lt;mikita.lipski@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Apply clock for voltage request</title>
<updated>2018-07-05T21:38:29Z</updated>
<author>
<name>Mikita Lipski</name>
<email>mikita.lipski@amd.com</email>
</author>
<published>2018-04-09T17:40:00Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=28825c841bfd993bbe5c9466533baca8520f08c3'/>
<id>urn:sha1:28825c841bfd993bbe5c9466533baca8520f08c3</id>
<content type='text'>
Translate dm_pp tructure to pp type
Call PP lib to apply clock voltage request for display

Signed-off-by: Mikita Lipski &lt;mikita.lipski@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
